Senior DFT Architect for SoCs | Relocation & Visa Support

Arm; Cambridge; Hybrid; GBP 126,000 - 171,000; Full time

Benefits offered by this job

Relocation package

Job summary

Arm is seeking a Senior Principal DFT Architect to lead architecture and implementation of design-for-test across CPU, GPU, IP, AI accelerators and multi-die SoCs. You will influence product roadmaps, collaborate with architecture, design and EDA vendors, and drive scalable DFT methodologies for high-quality test solutions.

This hybrid role offers opportunities to shape test technologies years ahead of production, lead technical investigations, and mentor engineers while contributing to industry

Qualifications

• Experience in DFT architecture and implementation.
• Strong understanding of modern SoC DFT methodologies (scan, ATPG, memory BIST, at-speed testing).
• Experience developing reusable DFT methodologies and automation.

Responsibilities

• Define DFT architecture for next-generation Arm IPs and SoCs.
• Develop scalable DFT methodologies and implementation flows across organizations.
• Evaluate emerging DFT technologies and lead technical investigations.
• Collaborate with architecture, verification and physical design teams to define robust DFT solutions.
• Work with EDA vendors to influence roadmaps and adoption of new technologies.
• Produce architecture specifications, methodology docs and deployment guidance.
• Provide technical leadership and mentorship across teams.
• Support engagements with customers and ASIC partners.
• Contribute to publications, patents and standards.

Skills

DFT architecture

ATPG

JTAG / IEEE 1149.1

IJTAG / IEEE 1687

Scripting (Python/Perl/Tcl)

Linux/Unix

Communication skills

Education

Degree in Electronic/Computer Engineering or related

Tools

Siemens Tessent

Synopsys DFT tools

Cadence DFT tools

Job description

Arm is seeking a Senior Principal DFT Architect to lead architecture and implementation of design-for-test across CPU, GPU, IP, AI accelerators and multi-die SoCs. You will influence product roadmaps, collaborate with architecture, design and EDA vendors, and drive scalable DFT methodologies for high-quality test solutions.

This hybrid role offers opportunities to shape test technologies years ahead of production, lead technical investigations, and mentor engineers while contributing to industry