Senior Semiconductor Test Lead — Equity & AI Accelerator

Fractile

Greater London

On-site

GBP 110,000 - 170,000

Full time

5 days ago
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Benefits offered by this job

Equity & Ownership
Private Medical
Dental and Vision
Pension
25 Days holiday
Life/Critical Illness Insurance

Job summary

Fractile in the United Kingdom seeks a senior Semiconductor Test Engineering leader to drive manufacturing test strategy and silicon production readiness for next‑generation AI accelerators. You will oversee test development from DFT strategy to high‑volume ramp, coordinating internal teams and external partners to deliver robust, scalable test solutions.

You will lead efforts across PCIe Gen6, LPDDR, advanced packaging, and high‑speed interfaces, ensuring coverage, quality, and cost efficiency

Qualifications

  • 8+ years in semiconductor test engineering with leadership or technical lead roles.
  • Experience with external test development partners or OSATs.
  • Deep experience in ATE test development (e.g., Advantest 93K, Teradyne).
  • Strong understanding of DFT (scan, ATPG, LBIST, MBIST) and memory testing.
  • Ability to lead and mentor test engineering teams.
  • Familiarity with advanced CMOS nodes and packaging test challenges.
  • Expertise in silicon debug, characterization, and cross‑domain correlation.

Responsibilities

  • Drive the manufacturing test strategy for AI accelerator devices, including PCIe Gen6, LPDDR, and advanced packaging test.
  • Lead and mentor a team of chip test engineers; oversee test program development and pattern bring‑up.
  • Manage external test development partners; oversee scoping, schedules, and quality of deliverables.
  • Define test software architecture, DFT usage, and test content for high‑speed logic, memory, and IO blocks.
  • Collaborate with design, packaging, validation, and operations to ensure manufacturability and yield ramp success.
  • Oversee silicon bring‑up and ATE correlation, failure analysis, shmooing, stress testing, and yield improvement.

Skills

Test leadership
DFT/ATPG
Memory testing
High-speed IO testing
External partners mgmt
CMOS nodes
Silicon debug
Cross-functional collaboration

Tools

Advantest 93K
Teradyne

Job description

Fractile in the United Kingdom seeks a senior Semiconductor Test Engineering leader to drive manufacturing test strategy and silicon production readiness for next‑generation AI accelerators. You will oversee test development from DFT strategy to high‑volume ramp, coordinating internal teams and external partners to deliver robust, scalable test solutions.

You will lead efforts across PCIe Gen6, LPDDR, advanced packaging, and high‑speed interfaces, ensuring coverage, quality, and cost efficiency

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