Senior Design Verification Engineer

JR United Kingdom; Peterborough; On-site; GBP 50,000 - 70,000; Full time

Job summary

A leading company at the forefront of the RISC-V revolution seeks a Senior Design Verification Engineer in Peterborough. You will be responsible for developing verification infrastructure, implementing strategies, and collaborating with design teams. The role offers diverse workloads and excellent benefits in an innovative setting.

Qualifications

• Strong proficiency in SystemVerilog and UVM.
• Solid understanding of mixed hardware/software verification.
• Experience with RISC-V architectures preferred.

Responsibilities

• Develop and maintain verification infrastructure.
• Define and implement verification strategies.
• Manage functional and code coverage metrics.
• Troubleshoot, debug and resolve issues.

Skills

SystemVerilog

UVM

mixed hardware/software verification

RISC-V architectures

Job description

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Senior Design Verification Engineer, peterborough

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Client:

Platform Recruitment

Location:

peterborough, United Kingdom

Job Category:

Other

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EU work permit required:

Yes

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Job Views:

4

Posted:

31.05.2025

Expiry Date:

15.07.2025

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Job Description:

Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution developing IC that has high-impact applications across machine learning, aerospace and automotive.

Flat structure with a highly diverse workload and excellent benefits.

Responsibilities:

• Develop and maintain verification infrastructure in collaboration with design teams and external partners.
• Define and implement detailed verification strategies and architectures to ensure product quality and performance.
• Manage functional and code coverage metrics to track and report progress.
• Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests.

Requirements:

• Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies.
• A solid understanding of mixed hardware/software verification approaches.
• Experience with RISC-V architectures is preferred.
• Proven ability to work effectively with design teams and external partners to achieve project goals.