Senior Design Verification Engineer

JR United Kingdom; Leicester; On-site; GBP 40,000 - 60,000; Full time

Job summary

A leading company in the RISC-V revolution is seeking a Verification Engineer to join their innovative team. This role involves developing verification infrastructure and collaborating with diverse teams to define strategies that ensure product quality in machine learning, aerospace, and automotive applications. The ideal candidate should possess strong experience in SystemVerilog, UVM, and mixed verification approaches, with a focus on RISC-V architectures being an advantage.

Qualifications

• Strong proficiency in SystemVerilog and UVM required.
• Experience with RISC-V architectures is preferred.
• Ability to work effectively with design teams and external partners.

Responsibilities

• Develop and maintain verification infrastructure with design teams.
• Define and implement verification strategies to ensure product quality.
• Manage metrics and troubleshoot issues while maintaining quality dashboards.

Skills

SystemVerilog

UVM

Mixed hardware/software verification approaches

RISC-V architectures

Job description

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Job Views:

4

Posted:

31.05.2025

Expiry Date:

15.07.2025

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Job Description:

Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution developing IC that has high-impact applications across machine learning, aerospace and automotive.

Flat structure with a highly diverse workload and excellent benefits.

Responsibilities:

• Develop and maintain verification infrastructure in collaboration with design teams and external partners.
• Define and implement detailed verification strategies and architectures to ensure product quality and performance.
• Manage functional and code coverage metrics to track and report progress.
• Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests.

Requirements:

• Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies.
• A solid understanding of mixed hardware/software verification approaches.
• Experience with RISC-V architectures is preferred.
• Proven ability to work effectively with design teams and external partners to achieve project goals.