Senior Design Engineer Cambridge

AccelerComm Ltd; Cambridge; Hybrid; GBP 90,000 - 130,000; Full time

Benefits offered by this job

EMI share options

Pension

Private health insurance

Flexible working hours

Hybrid working

Bonus up to 20%

Job summary

AccelerComm Ltd in Cambridge is seeking Senior Design Engineers to develop RTL for non-terrestrial communications hardware, aiming to deploy a space-qualified 5G base station on satellites. You will contribute to RTL design, testbench creation, and deployment on FPGA/ASIC platforms, collaborating with Algorithm and System Architecture teams.

The role emphasizes timing, power management, and high-speed interfaces, with hybrid working and opportunities to influence the full design lifecycle.

Qualifications

• Essential: Expert knowledge of RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products.
• Essential: Strong skillset delivering digital designs in the ASIC and FPGA industry.
• Essential: Optimisation of timing and hardware resources for high throughput data or signal processing; experience in power management, synthesis and timing analysis.
• Essential: Track record collaborating across teams to produce integrated solutions.
• Essential: Experience in technical documentation writing – design specifications, user guides, verification plans.
• Essential: Expert user of EDA tools for simulation and synthesis.
• Desirable: Knowledge of communications signal processing algorithms (e.g., ECC, equalisation, channel estimation, beamforming).
• Desirable: Familiarity with AMBA bus protocols.
• Desirable: Understanding of UVM verification techniques or practical UVM IP verification.
• Desirable: Experience with C++/SystemC for design modelling and integration.
• Desirable: Experience with high-speed interfaces such as PCI-E or JESD.
• Desirable: Knowledge of Python scripting.
• Desirable: Knowledge of project methodologies across the design lifecycle (agile, waterfall) and traceability.
• Desirable: Experience with AMD FPGAs and associated design tools or ASIC backend tools.

Responsibilities

• Work closely with the Algorithm and System Architecture teams to translate requirements into micro-architectures for RTL implementations.
• Implement designs targeting FPGA and ASIC using industry-standard techniques, including testbench creation.
• Deploy designs onto FPGA development platforms for validation and system integration.
• Adhere to AccelerComm engineering methodology and design techniques; propose improvements to flow and product quality.
• Collaborate across design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC/FPGA.

Skills

RTL Verilog/SystemVerilog

ASIC/FPGA design

Timing optimization

Power management

Technical documentation

EDA tools

C++/SystemC modeling

UVM verification

PCI-E/JESD interfaces

Python scripting

AMBA protocols

Project methodologies (Agile/Waterfall

Job description

Senior Design Engineer

Department: Hardware

Employment Type: Full Time

Location: Cambridge

Reporting To: Tom Hollis

Description

We are looking for multiple Senior Design Engineers who will work on revolutionary technology that is at the leading edge of non-terrestrial communications, a 5G base station to be deployed on board satellites. This technology will underpin the next generation of mobile standards, giving complete coverage to the entire globe. AccelerComm develops the baseband signal processing technology, using hardware acceleration to generate world-leading error resilience, capacity and power efficiency.

You will work on the latest generation space-qualified devices, delivering standalone IP and integrated IP solutions.

This is a Cambridge based role; please also take a look at our vacancies in Southampton and Bristol.

Key Responsibilities

• Work closely with the Algorithm and System Architecture teams to understand requirements and translate them into mirco-architectures for RTL implementations
• Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of appropriate testbenches
• Deploy your designs onto the latest FPGA development platforms for validation and system integration
• Actively engage with and adhere to AccelerComm engineering methodology, processes and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the final product
• Collaborate with colleagues across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA

Skills, Knowledge & Expertise

Essential:

Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products

• A strong skillset in delivering digital designs in the ASIC and FPGA industry
• Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis
• Track record in collaborating across teams to produce integrated solutions
• Experience in technical documentation writing – design specifications, user guides, verification plans
• Expert user of EDA tools for simulation and synthesis

Desirable:

• Knowledge of communications signal processing algorithms (such as error correction, equalisation, channel estimation, beamforming)
• Familiarity with the AMBA bus protocols
• Understanding of UVM verification techniques or practical experience using UVM for IP verification
• Experience using C++/SystemC for design modelling and integration
• Experience with high speed interfaces such as PCI-E or JESD
• Knowledge of a scripting language, such as Python
• Knowledge and appreciation of project methodologies across the design lifecycle, including agile and waterfall, requirement capture and traceability
• Experience with AMD FPGAs and the associated design tools or with any EDA’s ASIC backend tools

Job Benefits

We pay competitive salaries which depend on skills and experience.

We offer a bonus scheme which pays up to 20% of salary annually, depending on performance. This is in addition to EMI share options, issued periodically. We offer a range of good quality company benefits including pension and private health insurance.

We operate flexible working hours and offer hybrid working.