Design Engineer

AccelerComm Ltd; Southampton; On-site; GBP 60,000 - 90,000; Full time

Benefits offered by this job

EMI share options

Pension

Private health insurance

Bonus up to 20%

Job summary

AccelerComm Ltd in Southampton, UK, is seeking a Design Engineer to drive hardware design for next-generation non-terrestrial communications technologies. You will translate requirements into RTL architectures for FPGA and ASIC, delivering standalone and integrated IP solutions.

The role emphasizes collaboration across design, verification, and physical implementation, with a strong focus on efficiency, documentation, and adherence to engineering practices.

Qualifications

• Knowledge of RTL languages (Verilog, SystemVerilog, VHDL) for complex ASIC/FPGA products.
• Strong skill delivering digital designs in ASIC/FPGA industry.
• Track record collaborating across teams to produce integrated solutions.
• Experience in technical documentation writing (design specs, user guides, verification plans).
• Experienced user of EDA tools for simulation and synthesis.

Responsibilities

• Translate requirements and hardware architectures into RTL micro-architectures for RTL implementations.
• Implement designs for FPGA and ASIC using standard techniques and testbenches.
• Support verification of implementations and fix issues.
• Engage with AccelerComm engineering methods and improve design flow efficiency and quality.
• Collaborate across the full design flow: micro-architecture, design, verification, physical implementation and optimisation.

Skills

RTL languages

Digital design

Cross-functional

Technical writing

EDA tools

C++/SystemC

UVM verification

PCI-E/JESD

Python scripting

Tools

Verilog/SystemVerilog

VHDL

EDA tools (simulation/synthesis)

Job description

Design Engineer

Department: Hardware

Employment Type: Full Time

Location: Southampton, UK

Description

You will work on revolutionary technology that is at the leading edge of non-terrestrial communications, a 5G base station to be deployed on board satellites. This technology will underpin the next generation of mobile standards, giving complete coverage to the entire globe. AccelerComm develops the baseband signal processing technology, using hardware acceleration to generate world-leading error resilience, capacity and power efficiency.

You will work on the latest generation space-qualified devices, delivering standalone IP and integrated IP solutions.

Key Responsibilities

As a Hardware Design Engineer, you will:

• Work closely with senior members of the hardware team to understand requirements and hardware architectures to translate them into mirco-architectures for RTL implementations
• Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of appropriate testbenches
• Support verification of your implementation and fix any issues found.
• Actively engage with and adhere to AccelerComm engineering methodology, processes and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the final product
• Collaborate with colleagues across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA

Skills, Knowledge and Expertise

Essential:

• Knowledge of an RTL language (Verilog, SystemVerilog, VHDL) for complex ASIC/FPGA products
• A strong skillset in delivering digital designs in the ASIC or FPGA industry
• Track record in collaborating across teams to produce integrated solutions
• Experience in technical documentation writing – design specifications, user guides, verification plans
• Experienced user of EDA tools for simulation and synthesis

Desirable:

• Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis
• Knowledge of communications signal processing algorithms (such as error correction, equalisation, channel estimation, beamforming)
• Familiarity with the AMBA bus protocols
• Understanding of UVM verification techniques or practical experience using UVM for IP verification
• Experience using C++/SystemC for design modelling and integration
• Experience with high speed interfaces such as PCI-E or JESD
• Knowledge of a scripting language, such as Python
• Knowledge and appreciation of project methodologies across the design lifecycle, including agile and waterfall, requirement capture and traceability
• Experience with AMD FPGAs and the associated design tools or with any EDA’s ASIC backend tools

Benefits

We pay competitive salaries which depend on skills and experience. We offer a bonus scheme which pays up to 20% of salary annually, depending on performance. This is in addition to EMI share options, issued periodically. We offer a range of good quality company benefits including pension and private health insurance.

Our offices on Southampton Science Park provide a great working environment, with a coffee shop, bike storage, showers, plenty of free parking and EV charging points.