Senior Cryo-CMOS ASIC Validation Engineer

IonQ, Inc.

Oxford

Hybride

GBP 85 000 - 120 000

Plein temps

Il y a 12 jours

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Avantages offerts par ce poste

Stock options
Hybrid work model
Competitive salary
Private medical & dental

Résumé du poste

IonQ, Inc. in Oxford is seeking a Senior Silicon Validation Engineer for our Cryo-CMOS IC team. You will own validation across analogue/digital interfaces, develop test platforms, and drive first-silicon bring-up and characterisation at cryogenic temperatures.

You will collaborate with design, verification, firmware and external partners, mentor engineers, and shape validation standards to ensure robust silicon acceptance across IonQ’s quantum processors.

Qualifications

  • Experience validating analogue or mixed-signal silicon with ownership of bring-up programmes.
  • Hands-on laboratory skills with test equipment and measurement confidence.
  • Ability to assess test coverage, risk, and programme status.

Responsabilités

  • Own the silicon validation strategy, plans, acceptance criteria and readiness reviews across chip and system interfaces.
  • Develop validation boards, fixtures and reusable Python automation and regression suites.
  • Plan and lead cryogenic measurements, calibration and root-cause analysis across multiple temps and test structures.
  • Lead technical reviews, mentor engineers and improve throughput and data quality.

Connaissances

Analog/mixed-signal
Oscilloscopes & meters
Python automation
Git & version control

Formation

BEng/MEng in Electrical Engineering

Outils

Signal generators
Spectrum analysers
SPI/I2C/JTAG
FPGA-based platforms

Description du poste

IonQ, Inc. in Oxford is seeking a Senior Silicon Validation Engineer for our Cryo-CMOS IC team. You will own validation across analogue/digital interfaces, develop test platforms, and drive first-silicon bring-up and characterisation at cryogenic temperatures.

You will collaborate with design, verification, firmware and external partners, mentor engineers, and shape validation standards to ensure robust silicon acceptance across IonQ’s quantum processors.

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