Lead Cryo-CMOS Silicon Validation Engineer

Entangled Future

Oxford

Hybrid

GBP 90,000 - 130,000

Full time

12 days ago

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

IonQ in Oxford, UK seeks a Senior Silicon Validation Engineer to lead analogue/mixed-signal validation for Cryo-CMOS ICs used in trapped-ion quantum processors. You’ll steer validation architecture, build test platforms and drive first-silicon bring-up from lab bring-up to system integration.

The role requires hands-on testing, measurement confidence and cross-functional collaboration with analogue/digital design, verification and firmware teams.

Qualifications

  • Substantial experience in analogue or mixed-signal silicon validation and characterisation with ownership of multiple silicon bring-up programmes.
  • Degree in electrical or electronic engineering or equivalent practical experience is expected.
  • Hands-on laboratory skills with sound judgement on test coverage, measurement confidence and programme risk.

Responsibilities

  • Own validation delivery across chip and system interfaces, coordinating with design, verification, firmware and systems engineers.
  • Set technical standards, guide other engineers and improve coverage, repeatability and test efficiency across ASIC generations.
  • Lead first-silicon bring-up and characterisation of various DACs, ADCs, references and regulators across supply, temperature and device variation.
  • Develop validation boards, fixtures and reusable Python automation, instrument drivers and regression suites with robust data analysis.

Skills

Analogue & mixed-signal validation
Python automation
Measurement & test equipment
Test planning

Education

Electrical or Electronic Engineering degree

Tools

Python

Job description

IonQ in Oxford, UK seeks a Senior Silicon Validation Engineer to lead analogue/mixed-signal validation for Cryo-CMOS ICs used in trapped-ion quantum processors. You’ll steer validation architecture, build test platforms and drive first-silicon bring-up from lab bring-up to system integration.

The role requires hands-on testing, measurement confidence and cross-functional collaboration with analogue/digital design, verification and firmware teams.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Senior Cryo-CMOS ASIC Validation Engineer
Senior Cryo-CMOS ASIC Validation Engineer

IonQ, Inc. • Oxford

Hybrid
GBP 85,000 - 120,000
Stock options
Hybrid work model
Competitive salary
+1
Senior Silicon Validation Engineer, Cryo-CMOS ASICs(Hybrid)
Senior Silicon Validation Engineer, Cryo-CMOS ASICs(Hybrid)

Capella Space • Oxford

Hybrid
GBP 90,000 - 130,000
Stock options
Annual performance bonus
Private medical and dental insurance
Senior Silicon Validation Engineer
Senior Silicon Validation Engineer

Entangled Future • Oxford

Hybrid
GBP 90,000 - 130,000
Senior Analog Mixed-Signal Modelling Engineer (Cryo-CMOS)
Senior Analog Mixed-Signal Modelling Engineer (Cryo-CMOS)

IonQ, Inc. • Oxford

Hybrid
GBP 90,000 - 125,000
Medical benefits
Dental benefits
Vision plans
+4
Senior Analog/Mixed-Signal Design & Modelling Engineer – Cryo-CMOS
Senior Analog/Mixed-Signal Design & Modelling Engineer – Cryo-CMOS

Ionq • Oxford

Hybrid
GBP 90,000 - 130,000
Senior Silicon Validation Engineer
Senior Silicon Validation Engineer

IonQ, Inc. • Oxford

Hybrid
GBP 85,000 - 120,000
Stock options
Hybrid work model
Competitive salary
+1
Senior Analog Mixed-Signal Design & Modelling Engineer
Senior Analog Mixed-Signal Design & Modelling Engineer

NightDragon Acquisition Corp. • Oxford

Hybrid
GBP 90,000 - 140,000
Comprehensive medical/dental/vision
401(k)
Unlimited PTO & holidays
+2
Senior Silicon Validation Engineer
Senior Silicon Validation Engineer

Capella Space • Oxford

Hybrid
GBP 90,000 - 130,000
Stock options
Annual performance bonus
Private medical and dental insurance
Senior Digital IC Design Engineer - Flexible, London
Senior Digital IC Design Engineer - Flexible, London

Entangled Future • Greater London

Hybrid
GBP 90,000 - 130,000
Central London location
Competitive salary
Group private medical insurance
+3
Senior RF IC Design Engineer — Deep-Cryo CMOS for Quantum Silicon
Senior RF IC Design Engineer — Deep-Cryo CMOS for Quantum Silicon

Quantum Motion Technologies • Greater London

On-site
GBP 120,000 - 180,000
Competitive salary
Share options scheme
Contributory pension
+5