Senior Analog IC Layout Engineer – Flexible Hours & 45 Days Leave

IC Resources; Southampton; On-site; GBP 70,000 - 90,000; Full time

Benefits offered by this job

Weighty pension scheme

Private medical insurance

Flexi-days

Up to 45 days total annual leave

Job summary

IC Resources in Southampton is seeking a Senior Analog IC Layout Engineer to translate schematic designs into transistor-level layouts within a growing mixed-signal IC design team. You will contribute to bespoke Analog/Mixed Signal and Digital Layouts in CMOS technology, ensuring layout best practices and verification are followed.

Eligible candidates should have experience in DRC/LVS, parasitic extraction, and Cadence design tools, with 40nm and below process exposure.

Qualifications

• Experience with ASIC/IC layout in CMOS processes.
• Proven ability to translate schematics into physical layouts.
• Understanding of layout best practices and verification.

Responsibilities

• Translate schematic designs into layout solutions at transistor level.
• Collaborate in a 10+ person mixed-signal IC design team.
• Complete bespoke Analog/Mixed Signal and Digital Layouts in CMOS.
• Adhere to layout verification and parasitic extraction processes.

Skills

DRC/LVS

Top-level verification

Analog/mixed-signal layout

Digital IC layout

Parasitic extraction

Layout from schematic

Schematic capture & simulation

CMOS technology

Cadence tools

Tools

Cadence IC design

Job description

IC Resources in Southampton is seeking a Senior Analog IC Layout Engineer to translate schematic designs into transistor-level layouts within a growing mixed-signal IC design team. You will contribute to bespoke Analog/Mixed Signal and Digital Layouts in CMOS technology, ensuring layout best practices and verification are followed.

Eligible candidates should have experience in DRC/LVS, parasitic extraction, and Cadence design tools, with 40nm and below process exposure.