Senior IC Layout Engineer

IC Resources; Southampton; On-site; GBP 70,000 - 90,000; Full time

Benefits offered by this job

Weighty pension scheme

Private medical insurance

Flexi-days

Up to 45 days total annual leave

Job summary

IC Resources in Southampton is seeking a Senior Analog IC Layout Engineer to translate schematic designs into transistor-level layouts within a growing mixed-signal IC design team. You will contribute to bespoke Analog/Mixed Signal and Digital Layouts in CMOS technology, ensuring layout best practices and verification are followed.

Eligible candidates should have experience in DRC/LVS, parasitic extraction, and Cadence design tools, with 40nm and below process exposure.

Qualifications

• Experience with ASIC/IC layout in CMOS processes.
• Proven ability to translate schematics into physical layouts.
• Understanding of layout best practices and verification.

Responsibilities

• Translate schematic designs into layout solutions at transistor level.
• Collaborate in a 10+ person mixed-signal IC design team.
• Complete bespoke Analog/Mixed Signal and Digital Layouts in CMOS.
• Adhere to layout verification and parasitic extraction processes.

Skills

DRC/LVS

Top-level verification

Analog/mixed-signal layout

Digital IC layout

Parasitic extraction

Layout from schematic

Schematic capture & simulation

CMOS technology

Cadence tools

Tools

Cadence IC design

Job description

This is a solid, stable opportunity for a Senior Analog IC Layout Engineer with a world-leading high-tech company based in Southampton. A flexible working set up is available with this role, with the ability to build up extra days off with flexi-working.

Please note, candidates for this role need to be eligible for security clearance.

Working within an expanding mixed-signal IC design team of 10+ engineers, the Senior Analog IC Layout Engineer will be working at transistor level to translate schematic designs into layout solutions. This team is a long-established group of IC design experts that bring deep expertise within a highly niche area, which is critical to several strategic sectors.

The Senior IC Layout Engineer will have a number of years’ experience in industry, a clear understanding of layout best practices and the ability to complete bespoke Analog/Mixed Signal and Digital Layout designs in CMOS technology.

Experience is required in some or all of the following:

• DRC and LVS
• Top Level Verification
• Experience working on 40nm and below
• Cadence IC design suite of tools.
• Analog/Mixed Signal and/or Digital IC design skills/knowledge
• Parasitic extraction and evaluation
• Layout of block level designs from scratch, working on schematic capture and simulation of the designs

On offer is a competitive base salary, and a truly superb benefits package including

• weighty pension scheme
• private medical insurance
• flexi-days
• potential to take up to 45 days total annual leave in a year