Low-Power Front-End Design Engineer for Wi‑Fi SoCs

Nordic Semiconductor; West of England; Sur place; GBP 70 000 - 100 000; Plein temps

Avantages offerts par ce poste

Competitive salary

Flexible working hours

Medical insurance

Family-friendly policies

Résumé du poste

Nordic Semiconductor is seeking a Front-End Design Engineer to contribute to the development of Wi-Fi SoCs from architecture through tape-out in Bristol and Stockholm. You will deliver RTL, verify IP blocks, and collaborate across architecture, software, and verification teams to meet performance and power goals.

The role requires strong HDL skills (SystemVerilog/Verilog/VHDL), RTL flows, and experience with Synthesis, STA, and DFT.

Qualifications

• BSc/MSc in Electronics Engineering or similar.
• Experience in digital IC design, verification, synthesis, static timing analysis or pre-silicon prototyping.
• Solid understanding of RTL design and verification principles, SoC implementation, synthesis and STA.
• Knowledge of RTL implementation flows and tools, and of downstream constraints: synthesis, timing, clock-domain crossing, low-power/UPF and DFT.
• Strong proficiency in hardware description languages (SystemVerilog, Verilog, VHDL) and end-to-end digital design flow.
• Experience running/debugging LEC and VCLP violations as a design quality sign-off requirement.
• Familiarity with functional verification and coverage-driven sign-off.
• Familiarity with scripting (Tcl, Python) and a Linux environment; industry EDA toolchains.
• Excellent written and verbal communication skills in English.

Responsabilités

• Front-end design and development of digital ICs for Wi‑Fi SoCs, from requirements and architecture through RTL implementation and tape-out.
• Design, integrate, and verify IP blocks, subsystems, and SoCs, ensuring functionality, performance, and quality targets are met.
• Develop and maintain RTL code and verification environments to deliver robust silicon solutions.
• Drive SoC integration activities with architecture, verification, software, DFT, and implementation teams.
• Implement and optimize low-power design techniques for energy efficiency and performance.
• Support ASIC and FPGA synthesis, create and maintain technical specifications, and mentor engineers.

Connaissances

RTL design

SystemVerilog

Verilog

VHDL

Digital IC design

Synthesis

STA

DFT

UPF

Python

Tcl

Linux

EDA toolchains

English communication

Formation

BSc/MSc Electronics Engineering

Outils

EDA tools

Simulation tools

Description du poste

Nordic Semiconductor is seeking a Front-End Design Engineer to contribute to the development of Wi-Fi SoCs from architecture through tape-out in Bristol and Stockholm. You will deliver RTL, verify IP blocks, and collaborate across architecture, software, and verification teams to meet performance and power goals.

The role requires strong HDL skills (SystemVerilog/Verilog/VHDL), RTL flows, and experience with Synthesis, STA, and DFT.