AI-Enhanced ASIC Synthesis & Timing Engineer

Nordic Semiconductor; West of England; On-site; GBP 70,000 - 110,000; Full time

Benefits offered by this job

Competitive salary with incentive plan

Medical insurance

Family-friendly policies and benefits

Job summary

Nordic Semiconductor seeks talented engineers skilled in synthesis and static timing analysis to advance next-generation ultra-low power Wi‑Fi chips. You will work within the CSSC team on design flows and tape-outs for silicon realization.

You will contribute to timing constraints, ECO-driven timing closure, DFT integration, and collaboration with digital design teams to translate concepts into concrete implementations, while applying scripting skills and AI-assisted tools in a fast-paced,

Qualifications

• Bachelor/Master level electronics engineering degree required.
• Several years of chip implementation experience.
• Experience with Synopsys and Cadence IC implementation and verification/sign-off tools.
• Contribution to design flow development and setup.
• Proficient scripting in TCL, Perl or Python.
• Experience with AI-assisted EDA flows or code/script generation is a plus.
• Excellent written and verbal English communication.

Responsibilities

• Develop, refine, and validate timing constraints for accurate implementation and timing analysis.
• RTL-to-gate synthesis optimizing performance, power, and area.
• Perform comprehensive Static Timing Analysis across corners and operating conditions.
• Drive timing closure by evaluating ECOs to meet performance and schedule targets.
• Perform logic equivalence checking between RTL, nets, and post-ECO implementations.
• Conduct low-power verification to ensure power intent compliance.
• Collaborate with DFT team to integrate test structures and ensure manufacturability.
• Work with design teams to translate intent into implementation with clear feedback.

Skills

Synthesis

Static Timing Analysis

Chip implementation

Synopsys tools

Cadence tools

Scripting (TCL/Perl/Python)

AI-assisted design tools

English communication

Education

BSc/MSc in Electronics Engineering

Tools

Synopsys IC Compiler

Cadence IC/Verification tools

Signoff/verification tools

Job description

Nordic Semiconductor seeks talented engineers skilled in synthesis and static timing analysis to advance next-generation ultra-low power Wi‑Fi chips. You will work within the CSSC team on design flows and tape-outs for silicon realization.

You will contribute to timing constraints, ECO-driven timing closure, DFT integration, and collaboration with digital design teams to translate concepts into concrete implementations, while applying scripting skills and AI-assisted tools in a fast-paced,