Hardware Engineer (FPGA/ASIC) - 2027 Summer Internship

TU Berlin; Greater London; On-site; GBP 18,000 - 24,000; Full time

Job summary

Jane Street offers an internship where you will work closely with full-time engineers on real hardware design projects. You will apply programming language techniques to improve RTL design and testing using Hardcaml, OCaml, and related tools.

The program pairs interns with mentors, providing hands-on learning and exposure to our internal systems. You will contribute to FPGA or ASIC related tasks, gaining practical experience while exploring hardware design in a dynamic environment.

Qualifications

• Comfortable with a software programming language.
• Experienced with a Hardware Description language (VHDL, Verilog, Chisel, Pymtl, or other).
• Experienced with FPGA or ASIC vendor tools - Vivado or Quartus for FPGAs, Genus or Innovus for ASICs.
• Experienced with building a working hardware project (either FPGA or ASIC).
• Interested in learning how to use FPGAs or ASICs in networking context.

Responsibilities

• Work on hardware design projects mentored by full-time colleagues.
• Gain exposure to the Hardcaml tech stack used for RTL design and testing.
• Contribute to shaping projects from concept to a working design.

Skills

Programming language

HDL experience

FPGA/ASIC tools

Project experience

English fluency

Tools

Vivado

Quartus

Genus

Innovus

Job description

Aufgabenbeschreibung

About the position

Our goal is to give you a real sense of what it's like to work at Jane Street full time while also providing a truly unparalleled educational experience. As an intern, you are paired with full-time employees who act as mentors, collaborating with you on real-world projects we actually need done.

In this internship, you'll learn how we use tools to make programming faster, more pleasant, and more reliable. We apply these same principles to our hardware engineering work, and we're looking for people who are interested in using programming language technology to improve the process of designing, testing, and validating hardware designs. We use Hardcaml, an OCaml library for succinctly describing hardware in RTL. Hardcaml is tightly integrated into our development environment, so you'll also gain lots of exposure to the libraries and tools that are foundational to our internal systems. No previous knowledge of Hardcaml is required.

The hardware team at Jane Street works on both FPGA and ASIC designs. Depending on your background and experience, we'll craft a project that gives you exposure to our shared Hardcaml tech stack, as well as targeting an FPGA or ASIC platform.

During the programme, you'll dive deep on one project, mentored closely by the full-time employees who helped design it. Some intern projects consider big-picture questions that we're still trying to figure out, while others involve building something new. Your mentors will help you gain a better understanding of the wide range of problems we solve every day. We expect interns to build hardware applications from concept to a working design; your projects will predominantly involve OCaml & Hardcaml, for both RTL design and testing/integration.

If you’d like to learn more, you can read about our interview process, meet some of our newest hires, or check out our OCaml All The Way Down talk and Programmable Hardware podcast episode. You can also learn more about Jane Street’s internship programme here.

Erwartete Qualifikationen

About you

We don't expect you to have a background in finance, OCaml, functional programming, or any other specific field-we're looking for smart people who enjoy solving interesting problems. We're more interested in how you think and learn than what you currently know. You should be:

• Comfortable with a software programming language
• Experienced with a Hardware Description (or Construction) language (VHDL, Verilog, Chisel, Pymtl, or other), for both writing and testing hardware designs
• Experienced working with FPGA or ASIC vendor tools - Vivado or Quartus for FPGAs, Genus or Innovus for ASICs
• Experienced with building a working hardware project (either FPGA or ASIC) through an academic, professional, or personal project
• Interested in learning how to use FPGAs or ASICs in the context of networking
• Fluent in English