FPGA/ASIC Hardware Intern: Mentored OCaml Projects

Tum International Gmbh; Greater London; Hybrid; GBP 28,000 - 39,000; Full time

Job summary

Jane Street offers a Summer Internship in Hardware Engineering (FPGA/ASIC) where you pair with mentors to work on real projects the team actually needs done.

You'll explore OCaml and Hardcaml to describe hardware, test designs, and integrate RTL code, with exposure to the internal toolchain and workflow. No prior Hardcaml experience required, and you’ll gain hands-on FPGA/ASIC experience throughout the program.

Qualifications

• Comfortable with a software programming language.
• Experienced with a Hardware Description language (VHDL, Verilog, Chisel, Pymtl, or other) for both writing and testing hardware designs.
• Experienced working with FPGA or ASIC vendor tools - Vivado or Quartus for FPGAs, Genus or Innovus for ASICs.
• Experienced with building a working hardware project (FPGA or ASIC) through an academic, professional, or personal project.
• Interested in learning how to use FPGAs or ASICs in networking contexts.

Responsibilities

• Collaborate on a hardware project with mentorship from full-time engineers.
• Design, test, and validate hardware components using OCaml & Hardcaml where applicable.
• Contribute to both RTL design and integration efforts on FPGA/ASIC work.
• Present progress and lessons learned to the hardware team during the internship program.

Skills

OCaml

Hardcaml

Verilog

VHDL

FPGA Tools

Tools

Vivado

Quartus

Genus

Innovus

Job description

Jane Street offers a Summer Internship in Hardware Engineering (FPGA/ASIC) where you pair with mentors to work on real projects the team actually needs done.

You'll explore OCaml and Hardcaml to describe hardware, test designs, and integrate RTL code, with exposure to the internal toolchain and workflow. No prior Hardcaml experience required, and you’ll gain hands-on FPGA/ASIC experience throughout the program.