Hardware Engineer (FPGA/ASIC)

TU Berlin; Greater London; On-site; GBP 90,000 - 120,000; Full time

Job summary

Jane Street is seeking engineers with experience in both software and hardware design to help build FPGA or ASIC-based applications. We value programming language expertise to improve hardware design, testing, and validation.

You will work on FPGA and ASIC designs using Hardcaml, OCaml, and related tools, with exposure to Verilog and C. The role emphasizes a software engineering mindset, curiosity, collaboration, and ongoing learning in a fast-paced environment.

Qualifications

• Comfortable with a software programming language.
• Experienced with a Hardware Description language (VHDL, Verilog, Chisel, Pymtl, or other).
• Experience with FPGA or ASIC vendor tools - Vivado or Quartus for FPGAs, Genus or Innovus for ASICs.
• Built a hardware project (academic, professional, or personal).
• Interested in using FPGAs/ASICs in networking contexts.
• Strong programming ability and love for technology.

Responsibilities

• Design and implement new FPGA/ASIC applications from ground up.
• Extend and refine high-level design and testing tools used internally.
• Work with OCaml/Hardcaml for RTL design and testing; some Verilog and C may be involved.

Skills

Software programming

Hardware description languages

English fluency

Tools

Vivado

Quartus

Genus

Innovus

Job description

Aufgabenbeschreibung

About the position

We are looking to hire engineers with experience in both software and hardware design to help us build our FPGA or ASIC-based applications.

We're big believers in the ability of tools to make programming faster, more pleasant, and more reliable. We apply these same principles to our hardware Engineering work, and we’re looking for people who are interested in using programming language technology to improve the process of designing, testing, and validating hardware designs. The hardware team at Jane Street works on both FPGA and ASIC designs. We use Hardcaml, an OCaml library for succinctly describing hardware in RTL. Hardcaml is tightly integrated into our development environment, so you’ll also gain lots of exposure to the libraries and tools that are foundational to our internal systems. No previous knowledge of Hardcaml is required.

In this role, you’ll work on the ground-up design and implementation of new FPGA or ASIC applications, and help extend and refine the high-level design and testing tools that we use internally. Your day-to-day work will predominantly involve OCaml & Hardcaml, for both RTL design and testing/integration, but you can also expect to work with some Verilog and C. While you don’t need to have worked with OCaml specifically, a good background in typed programming languages is a plus.

If you’d like to learn more, you can read about our interview process, meet some of our newest hires, or check out our OCaml All The Way Down talk and Programmable Hardware podcast episode.

Erwartete Qualifikationen

About you

We don’t expect you to have a background in OCaml, finance, or any other specific field—we’re looking for smart programmers who will approach hardware design with a software engineering mindset. We’re more interested in how you think and learn than what you currently know. You should be:

• Comfortable with a software programming language
• Experienced with a Hardware Description (or Construction) language (VHDL, Verilog, Chisel, Pymtl, or other), for both writing and testing hardware designs
• Experienced working with FPGA or ASIC vendor tools - Vivado or Quartus for FPGAs, Genus or Innovus for ASICs
• Experienced with building a working hardware project (either FPGA or ASIC) through an academic, professional, or personal project
• Interested in learning how to use FPGAs or ASICs in the context of networking
• A top-notch programmer with a love for technology
• Intellectually curious, collaborative, and eager to learn
• Humble and unafraid to ask questions and admit mistakes
• Fluent in English