CPU RTL Design Engineer

European Tech Recruit; Cambridge; On-site; GBP 70,000 - 110,000; Full time

Job summary

A leading semiconductor company in Cambridge is seeking a talented CPU RTL Design Engineer to explore performance strategies and enhance RTL design. Candidates should have thorough knowledge of microprocessor architecture, Verilog or VHDL expertise, and experience with scripting languages. The role involves collaborating with a multi-functional engineering team to verify design performance and ensure power efficiency. Apply on LinkedIn or send your CV to the provided email.

Qualifications

• Thorough knowledge of microprocessor architecture and related areas.
• Knowledge of logic design principles with timing and power implications.
• Understanding of low power microarchitecture techniques.
• Experience with scripting languages such as Perl or Python.

Responsibilities

• Explore high performance strategies with the CPU modelling team.
• Develop and refine RTL design targeting power and performance goals.
• Work with multi-functional teams on physical design validation.
• Verify RTL design meets performance goals and timing constraints.
• Collaborate with multi-functional team on timing, area, reliability and power in physical design.

Skills

Knowledge of microprocessor architecture

Expertise in instruction fetch and decode

Knowledge of Verilog and/or VHDL

Experience using scripting language such as Perl or Python

Tools

Simulators

Waveform debugging tools

Waveform simulators

Scripting (Perl/Python)

Job description

European Tech Recruit are working closely with a leading semicon company, based in Cambridge, who are looking for a talented CPU RTL Design Engineer to join their team.

Responsibilities as CPU RTL Design Engineer

• Explore high performance strategies working with the CPU modelling team.
• Microarchitecture development / specification from early high‑level architectural exploration, through micro architectural research and arriving at a detailed specification.
• Development, assessment and refinement of RTL design to target power, performance, area and timing goals.
• Help the design verification team execute on the functional verification strategy.
• Help verify that the RTL design meets the performance goals.
• Work with multi‑functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power.

Requirements

• Thorough knowledge of microprocessor architecture including expertise in one or more of the following areas: instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out‑of‑order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems.
• Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools.
• Knowledge of logic design principles along with timing and power implications.
• Understanding of low power microarchitecture techniques.
• Understanding of high performance techniques and trade‑offs in a CPU microarchitecture.
• Experience using a scripting language such as Perl or Python.

If this role is of any interest please apply directly on LinkedIn or send a copy of your CV to [e-mail].

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