Senior HW Digital Verification Engineer – SoCs

NXP Semiconductors; Valbonne; On-site; EUR 90,000 - 130,000; Full time

Job summary

NXP Semiconductors Netherlands B.V. seeks a Senior HW Digital Design Verification Engineer to lead verification for complex ASIC/SoC blocks. You will define verification plans, build advanced testbenches, and drive coverage closure in a collaborative, cross-functional team.

The role requires strong SystemVerilog and UVM skills, plus experience in directing test environments from scratch and mentoring teammates to improve verification methodologies.

Qualifications

• 5+ years of experience in digital design verification of ASICs/SoCs.
• Strong proficiency in SystemVerilog and UVM.
• Experience creating verification environments and test plans from scratch.

Responsibilities

• Develop and execute verification plans for complex digital blocks.
• Create testbenches with constrained-random and assertions.
• Implement SystemVerilog/UVM based test environments.
• Analyze coverage and close gaps in verification.
• Mentor junior engineers and share expertise.

Skills

SystemVerilog

UVM

Testbench development

Python

Education

Electrical/Computer Engineering degree

Tools

EDA verification tools

Job description

NXP Semiconductors Netherlands B.V. seeks a Senior HW Digital Design Verification Engineer to lead verification for complex ASIC/SoC blocks. You will define verification plans, build advanced testbenches, and drive coverage closure in a collaborative, cross-functional team.

The role requires strong SystemVerilog and UVM skills, plus experience in directing test environments from scratch and mentoring teammates to improve verification methodologies.