Senior SoC DFT Engineer: AI-Driven Test & Validation

NXP Semiconductors; Grenoble; On-site; EUR 65,000 - 90,000; Full time

Job summary

Senior DFT Engineer at NXP Semiconductors will define, implement and validate advanced DFT solutions for complex SoCs used in Automotive and Industrial applications. You will collaborate with design, verification, and manufacturing teams to ensure robust test coverage and high-quality production testing.

Responsibilities include developing DFT architectures, integrating features like Scan, ATPG, Memory/Logic BIST, and JTAG, and driving testability across IPs and cores while mentoring juniors and

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Microelectronics, or related field.
• Strong experience in DFT design and verification for complex ASIC or SoC.
• Experience with Verilog/SystemVerilog.
• AI-driven programming or scripting skills using TCL, Python, Perl.
• Excellent communication and collaboration skills in a multidisciplinary environment.

Responsibilities

• Define and implement DFT architectures and solutions at IP, subsystem, and SoC level based on product requirements and specifications.
• Develop and integrate DFT features including Scan, ATPG, Memory BIST, Logic BIST, JTAG, and related test structures.
• Align DFT implementation across SoC platforms and IP blocks to ensure efficient, scalable, and high-quality test solutions.
• Develop and execute ATPG patterns to achieve target fault coverage for Stuck-At, Transition Delay, Memory BIST, and Logic BIST testing.
• Perform DFT verification, simulations, and validation activities to ensure the correctness and effectiveness of implemented test solutions.
• Collaborate with design, verification, physical design, and product engineering teams throughout the development cycle to ensure testability requirements are met.
• Support silicon bring-up activities and participate in post-silicon evaluation to ensure manufacturing test patterns are operational from first silicon.
• Analyze test results, debug failures, identify root causes, and drive yield and quality improvements.
• Work with manufacturing and ATE teams to enable efficient production test flows.
• Evaluate and adopt new DFT methodologies, tools, and industry best practices to improve test quality, coverage, and cost efficiency.
• Document DFT architecture, implementation details, verification strategies, and test plans.
• Provide technical leadership and mentorship to junior engineers when appropriate.

Skills

DFT design & verification

ATPG

Scan

Memory BIST

Logic BIST

JTAG/Boundary Scan

Verilog/SystemVerilog

Python

TCL

Perl

Education

Bachelor's or Master's in Electrical/Computer Engineering or Microelectronics

Tools

Synopsys TestMAX

Cadence Modus

Siemens Tessent

Job description

Senior DFT Engineer at NXP Semiconductors will define, implement and validate advanced DFT solutions for complex SoCs used in Automotive and Industrial applications. You will collaborate with design, verification, and manufacturing teams to ensure robust test coverage and high-quality production testing.

Responsibilities include developing DFT architectures, integrating features like Scan, ATPG, Memory/Logic BIST, and JTAG, and driving testability across IPs and cores while mentoring juniors and