Senior Digital Design Verification Engineer (UVM/SystemVerilog)

NXP Semiconductors NV; Valbonne; Sur place; EUR 70 000 - 110 000; Plein temps

Résumé du poste

NXP Semiconductors Netherlands B.V. is seeking a Senior HW Digital Design Verification Engineer to lead verification for complex ASIC/SoC blocks. You will define verification strategies, develop testbenches, and drive coverage closure with UVM and formal methods.

You will collaborate with design, architecture, and software teams, mentor engineers, and contribute to flow improvements while ensuring robust, high-quality digital designs across projects.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• 5+ years of experience in digital design verification of complex ASICs/SoCs.
• Strong proficiency in SystemVerilog and UVM.
• Experience with formal verification techniques is a plus.
• Solid understanding of digital design principles, computer architecture, and communication protocols.

Responsabilités

• Develop and execute verification plans for complex digital blocks and subsystems, including testbench architecture, testcase development, and coverage closure.
• Implement advanced verification methodologies such as UVM (Universal Verification Methodology) and formal verification techniques.
• Create and maintain verification environments using industry-standard tools and languages (e.g., SystemVerilog, UVM, OVM, e).
• Develop directed, constrained-random, and assertion-based testbenches to thoroughly validate design functionality and performance.
• Perform functional and code coverage analysis to ensure verification completeness.
• Debug complex design and verification issues, working closely with design engineers to identify root causes and propose solutions.
• Collaborate with design, architecture, and software teams to understand design specifications and requirements.
• Contribute to continuous improvement of verification methodologies, flows, and tools.
• Mentor junior engineers and share technical expertise within the team.

Connaissances

Problem solving

Communication

Team collaboration

Formation

Bachelor's or Master's in Electrical Engineering, Computer Engineering, or a related field

Outils

SystemVerilog

UVM

OVM

e language

Python

Waveform viewers

Coverage analysis tools

Description du poste

NXP Semiconductors Netherlands B.V. is seeking a Senior HW Digital Design Verification Engineer to lead verification for complex ASIC/SoC blocks. You will define verification strategies, develop testbenches, and drive coverage closure with UVM and formal methods.

You will collaborate with design, architecture, and software teams, mentor engineers, and contribute to flow improvements while ensuring robust, high-quality digital designs across projects.