Mixed-Signal IP Intern: Design & Benchmark Circuits

Cadence Design Systems; Valbonne; Vor Ort; EUR 8.900 - 13.000; Vollzeit

Zusammenfassung

Cadence Design Systems in Sophia-Antipolis, France, offers a 6-month internship starting early 2027 for engineering students. You will investigate analog and digital circuit options to monitor process variations and design/benchmark circuits under the Mixed-Signal IP (MSIP) team.

Ideal candidates are final-year master’s students in electrical/electronic engineering with an interest in circuit design; exposure to Cadence Virtuoso is a plus.

Qualifikationen

• Must be a final-year master’s student in electrical/electronic engineering.
• Interest in circuit design and semiconductor technology.
• Exposure to analog IC design tools like Cadence Virtuoso is a plus.

Aufgaben

• Explore available analog and digital circuit options to monitor process variations.
• Design and benchmark candidate circuits for MSIP roadmap.
• Collaborate with Mixed-Signal IP R&D to gain hands-on design experience.

Kenntnisse

Circuit design interest

Analog design EDA tools

Hands-on problem solving

Ausbildung

Master's student in electrical/electronic engineering

Tools

Cadence Virtuoso

Jobbeschreibung

Cadence Design Systems in Sophia-Antipolis, France, offers a 6-month internship starting early 2027 for engineering students. You will investigate analog and digital circuit options to monitor process variations and design/benchmark circuits under the Mixed-Signal IP (MSIP) team.

Ideal candidates are final-year master’s students in electrical/electronic engineering with an interest in circuit design; exposure to Cadence Virtuoso is a plus.