Digital Design Engineer

TechNET IT Recruitment Ltd; Provence-Alpes-Côte d'Azur; On-site; EUR 70,000 - 80,000; Full time

Benefits offered by this job

Annual bonus up to 10%

Job summary

Meyreuil, France-based Senior Digital IC / ASIC Design Engineer role requiring hands-on HDL design, RTL verification, and SoC integration. You will contribute to architecture, verification, and silicon validation within a secure R&D environment.

Key skills include Verilog/SystemVerilog/VHDL, RTL simulation, and experience with Synopsys/Cadence tools. Onsite role with strong collaboration across engineering teams and opportunities to influence future chips.

Qualifications

• Experience in digital IC/ASIC development.
• Proficient in HDL languages (Verilog/SystemVerilog/VHDL).
• Strong RTL verification and timing analysis skills.

Responsibilities

• RTL design and development of complex digital logic.
• Integration and verification of digital IP and SoC components.
• Product feasibility studies and architecture definition.
• Development of verification environments and test methodologies.
• Design analysis, debugging and validation activities.
• Close collaboration with cross-functional engineering teams.
• Driving continuous improvements to design and verification methodologies.

Skills

Digital ASIC/SoC design

Verilog/SystemVerilog/VHDL

RTL simulation & verification

Synopsys/Cadence tools

Static Timing Analysis

Python/TCL scripting

Embedded microcontrollers

Tools

Synopsys

Cadence

RTL design tools

Job description

Meyreuil, France | €70,000–€80,000 + Up to 10% Annual Bonus | Permanent | 100% Onsite

I'm currently recruiting on behalf of a global technology organisation developing advanced secure embedded technologies used across a range of safety-critical and security-focused applications.

This is an opportunity to join a highly experienced R&D team developing next-generation secure integrated circuits. You'll be involved throughout the full digital design lifecycle, working on technically challenging projects within a collaborative engineering environment.

The Role

As a Senior Digital IC / ASIC Design Engineer, you will be responsible for the design, integration and verification of complex digital blocks within advanced SoC devices.

Working alongside analogue, physical implementation, software and test engineering teams, you'll contribute to product architecture, RTL development, verification and silicon validation, helping deliver innovative embedded hardware solutions.

Key Responsibilities

• RTL design and development of complex digital logic
• Integration and verification of digital IP and SoC components
• Product feasibility studies and architecture definition
• Development of verification environments and test methodologies
• Design analysis, debugging and validation activities
• Close collaboration with cross-functional engineering teams
• Driving continuous improvements to design and verification methodologies

About You

You'll have experience in digital IC or ASIC development and enjoy solving technically complex engineering challenges.

Ideally you'll have experience with:

• Digital ASIC or SoC design
• Verilog, SystemVerilog and/or VHDL
• RTL simulation and digital verification
• Synopsys and/or Cadence design environments
• Static Timing Analysis, Logical Synthesis and Equivalence Checking
• Python and/or TCL scripting
• Development of complex SoCs incorporating embedded microcontrollers

Experience within secure hardware, cryptography, secure elements or embedded security technologies would be advantageous but isn't essential.

What's on Offer

• Up to 10% annual bonus
• Long-term R&D projects working on cutting-edge technology
• Collaborative team of experienced engineers
• Excellent opportunity to influence future product development

Location

This role is based onsite in Meyreuil, France (Monday–Friday) within a secure R&D environment, where the nature of the work requires engineers to be based on site.