Senior Digital ASIC Design Engineer

IC Resources; Meyreuil; Sur place; EUR 45 000 - 70 000; Plein temps

Résumé du poste

A global leader in semiconductor solutions is seeking a Digital ASIC Design Engineer for their R&D team. In this mid-senior level position, you will engage in high-security technology development, responsible for the architecture, integration, and verification of secure microcontroller chips for various applications. You're expected to collaborate across multidisciplinary teams, ensuring the quality and compliance of designs through rigorous validation processes, while enhancing design methodologies.

Qualifications

• Strong experience in digital ASIC design, ideally with embedded microcontrollers.
• Proficient in hardware description languages like Verilog or VHDL.
• Familiarity with ASIC design flow processes.

Responsabilités

• Participate in product feasibility studies and architecture definition.
• Integrate and verify digital IP blocks in complex SoCs.
• Support post-silicon validation and debugging.

Connaissances

Digital ASIC design

SoC design

Verification strategies

Hardware description languages (Verilog, SystemVerilog, VHDL)

ASIC design flow

Debugging

Formation

Master's degree in Electronics, Microelectronics

Outils

Synopsys toolchain

Cadence toolchain

Description du poste

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Principal Recruitment Consultant at IC Resources - Semiconductor Engineering division

A global leader in secure semiconductor solutions is looking for a Digital ASIC Design Engineer to join their R&D team working on secure microcontroller chips. These devices are designed for high-security applications across mobile communications, banking, and identity sectors.

As a Digital ASIC Design Engineer, you’ll play a key role in the architecture, integration, and verification of complex digital systems alongside a multidisciplinary team. The role offers exposure to full-chip design flow and direct contribution to product innovation.

Responsibilities:

• Participate in product feasibility studies and contribute to architecture definition
• Integrate and verify digital IP blocks in complex SoCs
• Develop and implement verification strategies and testbenches
• Contribute to design for test (DFT) strategy and implementation
• Collaborate with analog/RF, application, and test engineering teams throughout the product lifecycle
• Support post-silicon validation and debugging
• Continuously contribute to improvements in design methodology and verification environments
• Ensure quality compliance through thorough reviews and validation of design and verification results

Requirements:

• Master’s degree (or equivalent) in Electronics, Microelectronics, or a related field
• Strong experience in digital ASIC or SoC design, ideally involving embedded microcontrollers
• Proficient in hardware description languages (Verilog, SystemVerilog, or VHDL)
• Strong knowledge of ASIC design flow: RTL coding, synthesis, STA, equivalence checking
• Experience with industry-standard tools (Synopsys and/or Cadence toolchains)
• Familiarity with scrip

Tel - 01189073075

LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Industries

  Staffing and Recruiting

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