Verification Engineer - High-Speed Protocols (PCIe/UCIe)

Semidynamics; Barcelona; Hybrid; EUR 90,000 - 120,000; Full time

Benefits offered by this job

Hybrid work model in Barcelona

Work from anywhere for 1 week

Competitive compensation and benefits

Collaborative, technically driven team

Job summary

Semidynamics in Barcelona is seeking a senior ASIC/SoC design verification engineer with 7+ years of experience. You will build UVM‑based testbenches and verify high‑speed interfaces such as PCIe/UCIe, while serving as protocol expert across AMBA families.

Hybrid work model: 4 days in the Barcelona office, 1 day WFH, plus 1 week of work from anywhere. Strong Verilog/SystemVerilog and debugging skills are required.

Qualifications

• 7+ years in ASIC/SoC design verification with focus on high‑speed protocols.
• Deep expertise in on‑chip bus protocols (AXI, CXS, AHB, CHI).
• Proven experience developing UVM‑based testbenches and driving coverage‑driven sign‑off flows.
• Strong debugging, independent problem solving, and documentation skills.

Responsibilities

• Build and debug functional verification environments at IP and subsystem levels.
• Serve as protocol expert for AMBA and high‑speed interfaces (PCIe, UCIe, SerDes).
• Debug RTL, DV models, and specifications to ensure correctness.
• Develop and maintain UVM‑based testbenches and automation scripts.
• Triage failures, track bugs, and drive closure with cross‑functional teams.
• Optimize simulation runtime, capacity, and compile turnaround for large designs.
• Maintain documentation of methodologies, flows, and known issues.

Skills

ASIC/SoC verification

PCIe/UCIe/SerDes protocols

AXI/CXS/AHB/CHI bus protocols

UVM testbenches

Verilog/SystemVerilog

Simulation tools (VCS/Xcelium/Questa)

Debugging & problem solving

Scripting for automation (Python/Tcl/等

Documentation

Git/Perforce

LSF/Grid Engine

Perl/Python/TCL scripting

AI-assisted tooling in verification

Education

Bachelor’s or Master’s degree in Electrical or Computer Engineering

Tools

VCS

Xcelium

Questa

Job description

Semidynamics in Barcelona is seeking a senior ASIC/SoC design verification engineer with 7+ years of experience. You will build UVM‑based testbenches and verify high‑speed interfaces such as PCIe/UCIe, while serving as protocol expert across AMBA families.

Hybrid work model: 4 days in the Barcelona office, 1 day WFH, plus 1 week of work from anywhere. Strong Verilog/SystemVerilog and debugging skills are required.