Senior Space FPGA/SoC Hardware Architect

Gmv; Madrid; Híbrido; EUR 70.000 - 100.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Telework 8 weeks

Flexible hours

Career development

Mobility (intl)

Relocation package

Descripción de la vacante

GMV in Madrid is seeking a Senior Hardware Design Engineer (FPGA) to lead FPGA/SoC hardware architecture and system optimization within the space sector.

You will mentor junior engineers, collaborate across locations, and drive HDL coding, advanced verification (SystemVerilog/UVM), and documentation.

This role offers telework a portion of the year, flexible hours, international mobility and a path for technical leadership.

Formación

• Experience in FPGA/SoC architecture and HDL coding.
• Advanced verification using SystemVerilog/UVM.
• Ability to produce technical documentation.
• Willingness to travel within Europe.
• Mentoring and coaching teammates.

Responsabilidades

• Define architecture for FPGA/SoC hardware and interfaces.
• Code in VHDL/Verilog.
• Perform advanced verification using SystemVerilog/UVM.
• Optimize resources, timing and power.
• Produce technical documentation for hardware.
• Mentor and coach junior engineers.
• Collaborate across locations to ensure system-level optimization.

Conocimientos

FPGA architecture

HDL coding

SystemVerilog/UVM

C++/Python

Mentoring

Team collaboration

Effective communication

Herramientas

Vivado

Quartus

ModelSim

QuestaSim

Descripción del empleo

GMV in Madrid is seeking a Senior Hardware Design Engineer (FPGA) to lead FPGA/SoC hardware architecture and system optimization within the space sector.

You will mentor junior engineers, collaborate across locations, and drive HDL coding, advanced verification (SystemVerilog/UVM), and documentation.

This role offers telework a portion of the year, flexible hours, international mobility and a path for technical leadership.