Senior Hardware Design Engineer (FPGA)

GMV; Tres Cantos; Híbrido; EUR 60.000 - 90.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Hybrid working model

Teleworking up to 8 weeks/year

Relocation package

Health, dental and accident insurance

Language learning support

National and international mobility

Descripción de la vacante

GMV in Madrid is seeking a Senior Hardware Design Engineer specializing in FPGA/SoC. You will lead FPGA development, architecture definition, and mentor junior engineers in a fast‑paced environment.

You will work in a hybrid model with some travel across Europe for tests and meetings. Proficiency in VHDL/Verilog, SystemVerilog/UVM, and FPGA toolchains is required, with coding in C++ or Rust and Python beneficial.

Formación

• Experience in FPGA development and architecture definition.
• Proficiency in VHDL/Verilog and FPGA verification tools.
• Familiarity with modular/IP design and timing optimization.

Responsabilidades

• Lead FPGA/SoC hardware design projects and architecture definition.
• Mentor junior engineers and provide technical guidance.
• Define HW/SW interfaces and perform optimization and documentation.

Conocimientos

FPGA development

VHDL/Verilog

SystemVerilog/UVM

C++/Rust

Python

GIT

Herramientas

Vivado

Quartus

ModelSim

QuestaSim

Descripción del empleo

Senior Hardware Design Engineer (FPGA) | Job Details

If you think your perfect workmate would be R2D2... Your place is here! We are expanding our teams in the space sector. Well get to the point; we'll tell you what's not on the web. If you want to know more about us go to GMV website.

WHAT CHALLENGE WILL YOU BE TAKING ON?

You will join the receiving team to lead FPGA/SoC based hardware design projects, architecture definition, junior team mentoring and critical system optimization.

Developing functions:

• Architecture definition
• Coding in VHDL/Verilog
• Advanced verification (SystemVerilog/UVM)
• Resource optimization
• HW/SW interfaces definition
• Mentoring of junior engineers
• Technical documentation

WHAT DO WE NEED IN OUR TEAM?

For this position, we are looking for hardware engineering experts with experience in FPGA development, advanced VHDL/Verilog, synthesis and verification tools (Vivado, Quartus, ModelSim, QuestaSim), modular/IP design, timing optimization, high speed interfaces, C++ or Rust, Python, GIT. Knowledge of Process Automation, signal processing, HDL coder, soft core processors, standards (DO-254, ECSS), ASIC design would be an asset.

We will also value availability to travel because, although the bulk of the work is done in GMV's facilities in Madrid, travel for meetings or tests in European countries is necessary.

WHAT DO WE OFFER?

Hybrid working model and 8 weeks per year of teleworking outside your usual geographical area. Flexible start and finish times, and intensive working hours Fridays and in summer. Personalized career plan development, training and language learning support. National and international mobility. Do you come from another country? We can offer you a relocation package.

Competitive compensation with ongoing reviews, flexible compensation and discount on brands. Wellbeing program: Health, dental and accident insurance; free fruit and coffee, physical, mental and financial health training, and much more!

In our recruitment processes you will always have telephone and personal contact, face-to-face or online, with our talent acquisition team. In addition, bank transfers and bank cards will never be requested. If you are contacted through any other process, please write to our team at We promote equal opportunities in recruitment, and we are committed to inclusion and diversity.

WHAT ARE YOU WAITING FOR?

JOIN US#LI-Hybrid

If you have any questions please do not hesitate to contact Ignacio Martínez de Salinas, in charge of this vacancy. Ignacio Martínez de Salinas