Senior Functional Verification Engineer - SoC/IP, Hybrid

OPENCHIP & SOFTWARE TECHNOLOGIES; Barcelona; Hybrid; EUR 60,000 - 85,000; Full time

Benefits offered by this job

Hybrid work environment

Competitive remuneration

Base in Barcelona

Job summary

Openchip & Software Technologies S.L. in Barcelona is seeking an experienced Functional Verification Engineer to drive verification across SoC and IP designs.

You will collaborate with architecture, design, physical implementation and software teams to ensure top performance through high-quality verification. You will develop and maintain SystemVerilog/UVM and SystemC/C++ verification environments, create coverage plans, and execute verification plans including regressions, bring-up, and

Qualifications

• Master degree in a relevant field required.
• Minimum 5 years of experience in verification of complex SoC or IP.
• Proficient in SystemVerilog/UVM and SystemC/C++.
• Experience with constrained random, functional coverage, and design debugging.

Responsibilities

• Read and analyze system requirements and architecture documents.
• Develop and maintain verification environments (SystemVerilog/UVM/SystemC/C++) including stimuli, checkers, assertions, trackers and coverage.
• Execute verification plans: bring-up DV environments, regressions and debugging of test failures.
• Use standard verification tools and workflows (simulators, coverage analyzers, Unix, CI, bug tracking).
• Create and run test cases to verify functionality, performance and robustness in embedded C and SV.
• Identify, isolate and debug issues using simulation and debugging tools; drive resolution with design/architecture teams.
• Collaborate with cross-functional teams to achieve verification closure, perform coverage analysis, bug tracking, and regression testing.

Skills

SystemVerilog/UVM

SystemC/C++

Constrained random

Functional Coverage

Design debug

Formal Verification

UPF

HW-SW co-verification

Firmware-based verification

Bash/Perl/Python

Verification management tools

Debugging skills

English language

Education

Master Degree

Tools

Simulation tools

Job description

Openchip & Software Technologies S.L. in Barcelona is seeking an experienced Functional Verification Engineer to drive verification across SoC and IP designs.

You will collaborate with architecture, design, physical implementation and software teams to ensure top performance through high-quality verification. You will develop and maintain SystemVerilog/UVM and SystemC/C++ verification environments, create coverage plans, and execute verification plans including regressions, bring-up, and