PICs@ICFO Strategic Initiative: Junior Research Engineer position in PIC Design and Simulation

Institute of Photonic Sciences

Castelldefels

On-site

EUR 28,000 - 42,000

Full time

8 days ago
Application generator

A complete application in a minute — tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

Institute of Photonic Sciences (ICFO) in Castelldefels near Barcelona invites applications for a Junior Research Engineer in PIC design and simulation. The role focuses on the design and numerical simulation of integrated photonic devices and circuits and involves close collaboration with senior PIC designers and fabrication partners.

You will contribute to device modelling, optimization, layout preparation for fabrication, and design-for-manufacturing activities, with opportunities for

Qualifications

  • Experience in design and numerical simulation of integrated photonic devices and circuits.
  • Solid background in photonics and electromagnetic theory.
  • Willingness to develop PIC designs targeting fabrication and experimental validation.

Responsibilities

  • Design and simulate integrated photonic devices and circuits.
  • Perform electromagnetic and optical simulations using numerical methods (FDTD, FEM, eigenmode expansion).
  • Optimize device performance considering loss, coupling, bandwidth, and fabrication tolerances.
  • Develop photonic circuits by combining building blocks and simulate at circuit level when needed.
  • Prepare PIC layouts for fabrication following PDK specifications.
  • Collaborate with fabrication partners and internal teams during reviews and tape-out preparations.
  • Analyse experimental results and compare with simulations to guide iterative design improvements.
  • Develop scripts and workflows for design automation and data analysis.
  • Document methodologies and results in technical reports.

Skills

PIC design
Electromagnetic theory
Numerical simulation

Tools

FDTD
FEM
Eigenmode expansion

Job description

PICs@ICFO Strategic Initiative: Junior Research Engineer position in PIC Design and Simulation

As part of the PICs@ICFO Strategic Initiative, ICFO coordinates PIXEurope, a flagship Pilot Line funded under the European Chips JU program focused on Advanced Photonic Integrated Circuits (PICs) through which ICFO is advancing frontier technologies, including optical interposers for Co-packaged optics for next-generation optoelectronic and photonic devices.

To strengthen this initiative, ICFO is seeking junior researcher or engineer with experience in the design and numerical simulation of integrated photonic devices and circuits. The candidate should have a solid background in photonics and electromagnetic theory and be motivated to develop practical PIC designs targeting fabrication and experimental validation.

Position Overview:

We are offering a Junior Research Engineer position in Photonic Integrated Circuit (PIC) design and simulation to a well-qualified, highly motivated and dynamic young scientist or engineer who wishes to develop their career in integrated photonics in a friendly and stimulating research and technology environment.

The successful candidate will join the Optoelectronics research group at ICFO, led by Prof. Dr. Valerio Pruneri, and will contribute to the development of advanced photonic integrated circuits within the group’s research and technology-development activities.

The selected candidate will work closely with senior PIC designers, experimental researchers, fabrication partners, and other technical teams. The position is primarily design- and simulation-oriented, providing an opportunity to develop expertise across the complete PIC design workflow, from device modelling and optimization to circuit layout and preparation for fabrication.

Key Responsibilities:

  • Design and simulate integrated photonic devices and circuits,
  • Perform electromagnetic and optical simulations using numerical methods such as FDTD, FEM, eigenmode expansion, and mode solving.
  • Optimize photonic-device performance considering insertion loss, coupling efficiency, bandwidth, modal properties, fabrication tolerances, and footprint.
  • Develop photonic circuits by combining individual building blocks and perform circuit-level simulations where required.
  • Prepare PIC layouts for fabrication, following design rules and available process-design-kit (PDK) specifications.
  • Collaborate with fabrication partners and internal teams during design reviews, tape-out preparation, and design-for-manufacturing activities.
  • Analyse experimental characterization results and compare them with simulations to support device debugging and iterative design improvement.
  • Develop scripts and simulation workflows for design automation, parameter optimization, and data analysis.
  • Document design methodologies, simulation results, and device performance in structured technical reports.

This position will report to the Prof. Dr. Valerio Pruneri, Director of the European Chips JU Pilot Line PIXEurope.

PIXEurope is co-funded by the Chips Joint Undertaking and national funding authorities of the Participating States, Spain, Ireland, The Netherlands, Finland, Belgium, Portugal, Poland, Austria, France, Italy, United Kingdom. In particular, it is co-funded by Spain through the Ministry for Digital Transformation and Civil Service under reference CJU-010000-2025-0005, as part of the Recovery, Transformation and Resilience Plan (PRTR).

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

PICs@ICFO Strategic Initiative: Junior Research Engineer position in PIC Design and Simulation at The Institute of Photonic Sciences (ICFO)
PICs@ICFO Strategic Initiative: Junior Research Engineer position in PIC Design and Simulation at The Institute of Photonic Sciences (ICFO)

The Institute of Photonic Sciences (ICFO) • Castelldefels

On-site
EUR 38,000 - 54,000
Fixed-term contract
Family allowance
Training in PIC design
PICs@ICFO Strategic Initiative: Junior Process Engineer in PIC Packaging
PICs@ICFO Strategic Initiative: Junior Process Engineer in PIC Packaging

BIST People Working Group • Castelldefels

On-site
EUR 32,000 - 42,000
Full-time contract
State-of-the-art facilities
Hands-on packaging experience
+1
PICs@ICFO Strategic Initiative: Junior Process Engineer in PIC Packaging
PICs@ICFO Strategic Initiative: Junior Process Engineer in PIC Packaging

Institute of Photonic Sciences • Castelldefels

On-site
EUR 35,000 - 51,000
Junior PIC Design & Simulation Engineer
Junior PIC Design & Simulation Engineer

Institute of Photonic Sciences • Castelldefels

On-site
EUR 28,000 - 42,000
PICs@ICFO Strategic Initiative: Pilot Line Operation Officer at The Institute of Photonic Sciences (ICFO)
PICs@ICFO Strategic Initiative: Pilot Line Operation Officer at The Institute of Photonic Sciences (ICFO)

The Institute of Photonic Sciences (ICFO) • Castelldefels

On-site
EUR 42,000 - 62,000
Indefinite contract
Competitive salary
Family allowance
Onsite Junior PIC Design Engineer — Photonics & Simulation
Onsite Junior PIC Design Engineer — Photonics & Simulation

The Institute of Photonic Sciences (ICFO) • Castelldefels

On-site
EUR 38,000 - 54,000
Fixed-term contract
Family allowance
Training in PIC design
Junior PIC Packaging Engineer - Hands-on Process Innovator
Junior PIC Packaging Engineer - Hands-on Process Innovator

Institute of Photonic Sciences • Castelldefels

On-site
EUR 35,000 - 51,000
Junior Photonic Packaging Engineer
Junior Photonic Packaging Engineer

BIST People Working Group • Castelldefels

On-site
EUR 32,000 - 42,000
Full-time contract
State-of-the-art facilities
Hands-on packaging experience
+1
IC Electronic & Telecom Systems Engineer
IC Electronic & Telecom Systems Engineer

Brainlab Fira • Barcelona

Hybrid
Confidential
10% Bonus by objectives
Private fitness center
Access to advanced research infrastructure
Photonics Engineer: RF/PICs for Next-Gen Communications
Photonics Engineer: RF/PICs for Next-Gen Communications

Gradiant • Galicia

Hybrid
EUR 32,000 - 52,000
Teleworking and office
Personal training budget
Welcome Pack
+2