IC Electronic & Telecom Systems Engineer

Brainlab Fira; Barcelona; Hybrid; Full time

Benefits offered by this job

10% Bonus by objectives

Private fitness center

Access to advanced research infrastructure

Job summary

A pioneering research company in Barcelona is seeking an IC Electronic & Telecom Systems Engineer for an R&D project focused on photonic integrated circuits. The successful candidate will design mixed-signal and embedded systems that interface with advanced photonic technology. This role offers professional growth opportunities and a vibrant international research environment, with additional benefits such as a bonus and access to advanced facilities.

Qualifications

• Experience in designing mixed-signal systems for telecom applications.
• Familiarity with FPGA programming and control systems.
• Ability to collaborate with multidisciplinary teams.

Responsibilities

• Design the electronic–photonic interface layer including drivers and ADCs.
• Develop E/O and O/E transduction systems for optical operations.
• Build FPGA-based logic for modulation and readout.

Skills

Mixed-signal design

FPGA-based control

IC design

Optoelectronics

Electronic PCB design

Job description

IC Electronic & Telecom Systems Engineer

Fixed-term R&D project contract (12 - 24 months, with possibility of extension)

Full-time – 40 h/week

About the project

TARRANIX is a cutting-edge R&D initiative focused on developing next-generation photonic integrated circuits (PICs) for sustainable photonic computing. The project combines nanofabrication, photonic design, computing and photonics within a multidisciplinary team of physicists, engineers, and material scientists.

Role Overview

We are building the electronic layer that interfaces with the Tarranix fully photonic ALU. Your mission is to design the mixed-signal, reconfigurable, and embedded systems that drive on-chip lasers/modulators and read out multi-state optical logic. You will create the ELECTRONIC validation SoC: a small RISC-V–based calculator-style platform that tests and demonstrates our optical gates.

This role bridges telecom-grade optoelectronics, IC design, mixed-signal engineering, and FPGA-based control—a core position in shaping the first hybrid photonic processor.

KEY RESPONSIBILITIES

Design the electronic–photonic interface layer (laser/SOA drivers, modulator drivers, TIAs, ADCs, comparators).

Develop E/O and O/E transduction for 1550 nm systems.

Build FPGA-based control logic for modulation, timing, and multi-level photonic readout.

Integrate an ELECTRONIC RISC-V SoC (peripherals, memory-mapped photonic ALU interface, firmware).

Design mixed-signal PCBs / IC blocks ensuring clean analog + high-speed behavior.

Prototype the optical calculator demonstrator (keyboard, display, firmware).

Collaborate with photonics, metasurface, and nanofab teams to co-design the global architecture.

WHAT SUCCESS LOOKS LIKE

A working electronics wrapper enabling full optical ALU execution.

A functional electronic RISC-V calculator demonstrator powered internally by photonic logic.

Stable, repeatable E/O + O/E transduction supporting Tarranix multi-state gates.

Seamless collaboration with photonics and materials teams to evolve the full processor.

POSITION DETAILS

10% Bonus by objectives. Private fitness center and other amenities.

Access to advanced research infrastructure and external cleanroom laboratories.

Participation in an international, interdisciplinary research environment.

Opportunities for professional growth and scientific contribution in a pioneering photonics project.