Sr Physical Design Engineer (Synopsys Fusion / GF 12LP) - Remote – Full Time / Contract

Encore Semi; Deutschland; Remote; EUR 129.000 - 142.000; Vollzeit

Benefits dieser Stelle

PTO 15 days

Holidays 10

Medical benefits

Dental/Vision

Voluntary benefits

EAP

401k

Life/AD&D

Tuition reimbursement

Zusammenfassung

Encore Semi, Inc. is seeking a Sr Physical Design Engineer to drive the RTL-to-GDSII flow for next-generation SoCs, targeting 12LP FinFET processes.

The role focuses on final cleanup of DRC/LVS errors, fill insertion, and tape-out signoff using Fusion, PrimeTime, and Calibre. Remote position with full-time/contract terms; requires 10+ years ASIC physical design, strong scripting (Tcl/Python), and hands-on experience with Fusion Compiler, PrimeTime, Calibre, and RedHawk.

Qualifikationen

• 10+ years of ASIC physical design experience with successful tape-outs on FinFET nodes
• Deep expertise in quick DRC/LVS/ERC closure and final tape-out procedures
• Hands-on mastery of Fusion Compiler (or ICC2) and PrimeTime
• Strong scripting skills in Tcl, Python, and Bash
• Preferred: experience with GlobalFoundries 12LP/12LP+ and Mentor Calibre

Aufgaben

• Execute block-level and top-level physical design (floorplanning, CTS, routing) using Fusion Design Platform
• Drive STA, parasitic extraction, and timing closure across multiple corners using PrimeTime and StarRC
• Perform DRC, LVS, and antenna checks with Calibre and IC Validator
• Address 12nm FinFET challenges including routing rules and EM/IR drop analysis
• Maintain Tcl, Python, or Perl scripts to automate workflows

Kenntnisse

Tcl/Python scripting

Tools

Synopsys Fusion Compiler

PrimeTime

Calibre

Ansys RedHawk

Mentor Calibre

Jobbeschreibung

Sr Physical Design Engineer (Synopsys Fusion / GF 12LP) – Remote – Full Time / Contract

Full-time:Salary+Benefits+Bonuses/Contractor

WorkStatus: USCitizenorLawfulPermanentResident.

We have an immediate need for an expert Physical Design Engineer to drive a high-speed design across the finish line. You will be working on a 1GHz AES hard macro targeted for the GlobalFoundries 12LP (12nm FinFET) process node. The design is nearly complete; your primary objective upon joining will be the final cleanup of 7 remaining DRC/ERC errors, completing fill insertion, and executing the final Calibre signoff checks for tape-out.

Core Technical Environment & Ongoing Responsibilities:

Beyond this immediate milestone, you will take ownership of the RTL-to-GDSII flow for our next-generation SoCs, pushing the limits of Power, Performance, and Area (PPA).

• Implementation: Execute block-level and top-level physical design (floorplanning, CTS, routing) using the Synopsys Fusion Design Platform (Fusion Compiler).
• Timing & Signoff: Drive STA, parasitic extraction, and timing closure across multiple corners using PrimeTime and StarRC.
• FinFET Optimization: Address 12nm FinFET challenges including advanced routing rules, EM/IR-drop analysis (Ansys RedHawk), and complex SDC constraint management.
• Verification: Perform DRC, LVS, and antenna checks using Calibre and Synopsys IC Validator (ICV).
• Automation: Maintain robust Tcl, Python, or Perl scripts to automate workflows.

Qualifications:

• 10+ years of industry experience in ASIC physical design with successful tape-outs on advanced FinFET nodes (14nm/12nm/7nm).
• Deep expertise in rapid DRC/LVS/ERC closure and final tape-out procedures.
• Hands-on mastery of Synopsys Fusion Compiler (or ICC2) and PrimeTime.
• Strong scripting skills (Tcl, Python, Bash).
• Preferred: Direct experience with the GlobalFoundries 12LP/12LP+ node and Mentor Calibre.

The anticipated annual base salary for this position is between $150,000 to $165,000, which also includes a comprehensive benefits package.

Full-Time Benefits:

• 15 days of PTO per calendar year
• 10 paid Holidays per calendar year
• Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
• Dental & Vision: Company covers 50% of premiums for Employee and Dependents
• Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
• Employee Assistant Program (EAP)
• 401k - Traditional & Roth
• Life/AD&D and Long-Term Disability
• Tuition reimbursement

Equal Opportunity Policy Statement

Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances.

Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.

LinkedIn :: https://www.linkedin.com/in/rtl2gds/