> SoC Physical Design Engineer

Racyics GmbH; Dresden, Duisburg, Frankfurt; Vor Ort; EUR 50.000 - 65.000; Vollzeit

Benefits dieser Stelle

Flexible working hours

Mobile work

Financial contribution to childcare costs

Great team events

Zusammenfassung

A leading design service provider in Germany is seeking an Entry-Level SoC Physical Design Engineer. The role involves expertise in physical design, working with EDA tools, and supporting RTL2GDS flow. Candidates should have a Master’s degree in Electrical Engineering and proficiency in English. Benefits include flexible hours and mobile work options.

Qualifikationen

• Basic knowledge of the RTL2GDS design flow.
• Basic knowledge in hardware description languages.
• Self-driven and hands-on way of working.

Aufgaben

• Become an expert in physical design of complex digital and mixed signal SoCs.
• Work with EDA tools to implement customer designs in leading edge technology nodes.
• Support individual steps in RTL2GDS flow like Synthesis and P&R.

Kenntnisse

Analytical thinking

Solution-oriented thinking

Team player

Communication skills in English

Ausbildung

Master’s Degree in Electrical Engineering or Information Technology

Tools

Digital-IC-EDA tools from Cadence

Digital-IC-EDA tools from Synopsys

Digital-IC-EDA tools from Siemens

TCL programming

Python programming

Jobbeschreibung

Extending our international team, we are looking for a SoC Physical DesignEngineer (Entry-Level).

Job Description:

• Become an expert in physical design of complex digital and mixed signal SoCs
• Work with EDA tools and our design flows to implement customer designs in leading edge technology nodes
• Support individual steps in RTL2GDS flow like Synthesis, P&R, Physical Verification, EMIR, LEC, STA
• Address challenges in designing SoCs in leading edge Technologies
• Contribute to methodology developments with proposals and implementation of flow and methodology enhancements

Requirements:

• Master’s Degree in Electrical Engineering or Information Technology or similar
• Basic knowledge of the RTL2GDS design flow
• Basic knowledge in hardware description languages
• Basic knowledge in TCL and Python programming
• Self-driven and hands-on way of working
• Strong analytical and solution-oriented thinking
• Very good written and oral communication skills in English
• Team-player

Good to have skills:

• Experience with Digital-IC-EDA tools from Cadence, Synopsys and Siemens
• Experience in RTL2GDS in leading edge CMOS and/or FDSOI technologies
• Knowledge in timing modelling and timing analysis for digital designs
• Good written and oral communication skills in German

Location:

Employment Type:

Full-time (up to 40 hours per week)

About us:

Racyics is Europe’s leading design service provider for mixed-signal system-on-chip design and turnkey services in advanced nodes.

We deliver professional analog, digital and mixed-signal design services tailored to the customers’ needs with focus on realization of complex System-on-Chips in leading edge technology nodes. Our team of more than 100 employees covers the complete chip design process up to system architecture development. Racyics is working for major German and international semi-custom companies both as a service provider and in collaborative partnerships.

Working at Racyics comes with many benefits, including flexible working hours, mobile work, a financial contribution to your childcare costs and great team events.

Contact:

Send us a mail with your CV incl. your certificates, transcripts etc. attached [e-mail] . Please mind that we can only consider attachments in PDF format.