AMS IC Designer

IC Resources; München; Sur place; EUR 90 000 - 120 000; Plein temps

Résumé du poste

IC Resources in Munich is seeking a Senior AMS IC Design Engineer to contribute to precision timing circuits leveraging MEMS technology.

You will design analog and mixed-signal blocks, verify with schematic and post-layout simulations, and collaborate with Layout, Product and Test teams.

You will support chip bring-up, characterization, and cross-functional issues to deliver robust, industry-leading blocks. The role offers exposure to cutting-edge research and opportunities to publish findings.

Qualifications

• MS/PhD in Electrical Engineering with relevant industry experience
• Experience in analog/mixed-signal circuit design and silicon proven research

Responsabilités

• Design analog and mixed-signal circuits that meet specifications
• Contribute to architectural definitions and chip integration
• Perform schematic and post-layout verification simulations
• Coordinate with Layout Engineers to validate layouts
• Participate in chip bring-up, evaluation, and characterization
• Collaborate with Product, Characterization, Test and Applications engineers

Connaissances

CMOS circuits

Noise analysis

Schematic design

DFT/DFM awareness

Block integration

Formation

M.S. in Electrical Engineering

Ph.D. in Electrical Engineering

Outils

Cadence

MATLAB

VerilogA

Description du poste

We are seeking a highly skilled and motivated Senior AMS IC Design Engineer to join an innovative new design team in Munich. In this role, you will contribute to the development of precision timing circuits utilizing cutting-edge MEMS technology.

Responsibilities

• Design analog and mixed-signal circuits that meet architectural requirements and technical specifications
• Contribute to the architectural definition of designs and chip integration
• Perform calculations, design, and verification simulations to ensure building blocks meet specifications at both schematic and post-layout levels, while accounting for DFT and DFM
• Collaborate with Layout Engineers to validate proper layout using best-known methods
• Actively participate in chip bring-up, evaluation, and characterization, with a focus on owned blocks
• Work cross-functionally with Product, Characterization, Test, and Application Engineers to address issues related to owned circuit blocks
• Support additional projects as required by management or evolving business needs

Qualifications

• M.S. in Electrical Engineering or related field with a minimum of 4 years of relevant experience, or Ph.D. in Electrical Engineering with a minimum of 2 years of relevant experience
• Strong academic background with published research projects proven in silicon
• In-depth knowledge of CMOS circuits and noise analysis and experience in schematic design of some of the following: PLL, Sigma Delta ADC, temperature sensors, filters, LNA's, bandgaps, high speed output stages
• Proficiency in overseeing circuit layout for critical blocks
• Familiarity with programming languages such as MATLAB and VerilogA
• Proficient in using Cadence analog design tools

This is an exciting opportunity to work on industry-leading technology that powers a wide range of applications. You will have the chance to collaborate with a talented team of engineers and contribute to groundbreaking innovations in precision timing circuits. If you are ready to take your career to the next level, we look forward to hearing from you.