Sr. Engineer, Analog Mixed-Signal Design Munich, Bavaria, Germany

SiTime Corp.

München

On-site

EUR 90,000 - 130,000

Full time

43 hours ago
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Job summary

SiTime Corp. is seeking a Sr. Engineer, Analog Mixed-Signal Design in Munich to craft precision timing circuits using MEMS technology.

You will design analog and mixed-signal blocks, influence architectural decisions, and verify performance through simulations and post-layout checks. Collaboration with layout, product, and characterization teams is essential for successful bring-up. The role emphasizes ownership of owned blocks, strong signal integrity knowledge, and experience with Cadence

Qualifications

  • MS in EE or related field with 4+ years of experience, or a PhD with 2+ years.
  • Strong track record with CMOS, noise analysis and silicon proof points.
  • Proficient in PCB/layout considerations and DFT/DFM awareness.

Responsibilities

  • Design analog and mixed-signal circuits meeting architecture specs.
  • Contribute to architectural definition and chip integration.
  • Run simulations to verify blocks at schematic and post-layout stages.
  • Coordinate with Layout Engineers to validate layout and DFT/DFM.
  • Document blocks and run design reviews; support chip bring-up and characterization.
  • Collaborate cross-functionally with Product, Test, and Applications teams.

Skills

CMOS circuits
Noise analysis
PLL (Integer-N, Fractional-N)
Sigma-Delta ADCs
Temperature sensors
Analog/digital filters
Quartz/MEMS Oscillator
Sub-threshold circuits
Low-noise regulator & bandgap
High-speed output drivers
MATLAB
VerilogA
Oceanscript
Cadence analog design tools

Education

MS in Electrical Engineering or related field
PhD in Electrical Engineering (with ≥2 years related experience)

Tools

Cadence

Job description

Sr. Engineer, Analog Mixed-Signal Design

About SiTime

SiTime is the Precision Timing company.

Timing is the heartbeat of all electronics, ensuring performance, resilience and scalability. For decades, quartz devices, non-silicon technology, have kept systems in sync, but they struggle in harsher, more demanding environments. MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience. Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT.

Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 4 billion devices shipped, SiTime is changing the timing industry. For more information, visit: www.sitime.com .

Job Summary

TheSr.Engineer, Analog Mixed-Signal Designcontributes to building precision timing circuits, leveraging SiTime’s industry-leading MEMS technology. These products have applications ranging from high-performance Networking and Communications Infrastructure to ultra-low power Mobile platforms, including wearable devices. It is not necessary to meet all job requirements to be a qualified candidate for the position.

Responsibilities:

  • Design analog and mixed-signal circuits meeting architectural requirements and technical specifications
  • Contribute to the architectural definition of the design and chip integration
  • Perform calculations, design and verification simulations to ensure building blocks meet specifications at the schematic level and after post-layout extraction, while fully provisioning for DFT and DFM
  • Work closely with Layout Engineers to validate proper layout, using all best-known methods
  • Document assigned blocks, and hold preliminary and final design review meetings
  • Actively participate in the chip bring up, evaluation and characterization, with emphasis on owned blocks
  • Work cross-functionally with Product, Characterization, Test, and Application Engineers on issues related to owned circuit blocks
  • Support other projects as needed by management or as business needs change

Qualifications & Requirements:

  • M.S. in Electrical Engineering or related field with minimum 4 years of related experience, or Ph.D. in Electrical Engineering with minimum 2 years of related experience
  • Excellent academic record with published research projects prototyped and proven in silicon
  • Detailed knowledge of CMOS circuits and noise analysis
  • Core expertise in one of the following areas:
    • Integer-N and fractional-N PLL (Sigma-Delta and LC)
    • Sigma-Delta ADCs (preferably > 14 ENOB)
    • Temperature Sensors
    • Analog and digital filters
    • Quartz or MEMS Oscillator
    • Sub-threshold circuits
    • Low noise regulator and bandgap
    • High-speed output drivers
    • Knowledge of programming languages: Matlab, VerilogA, Oceanscript
  • Ability to oversee circuit layout for critical blocks
  • Ability to perform noise analysis
  • Knowledge of programming languages: MATLAB, VerilogA
  • Proficient in using Cadence analog design tools
  • Ability to oversee circuit layout for critical blocks

Desired Characteristics & Attributes:

  • Passionate, self-starter with a strong commitment to flawless execution
  • Excellent written and verbal communication skills required

Compensation:

At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent.

In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success.

SiTime is committed to providing equal employment opportunities to all employees and applicants. Employment decisions are based on qualifications, merit, and business needs. We do not discriminate on the basis of any characteristic protected by applicable law.

Learn More about SiTime: Review the Get to Know SiTime section of our career page to explore our culture, values, and what makes us unique.

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