Digital Design Lead

TSMC; München; Vor Ort; EUR 120.000 - 180.000; Vollzeit

Zusammenfassung

TSMC EU Design Center in Munich area is seeking a senior RTL designer to lead the development of embedded nonvolatile memory test chips and IP. You will define architecture, collaborate with circuit and product teams, and implement designs in Verilog/SystemVerilog while adhering to guidelines.

You will also drive verification plans and automation, including CDC/RDC checks and tooling integration. The role requires a Master’s in Electrical Engineering, 10+ years in logic/circuit design for

Qualifikationen

• Master's degree or above in Electrical Engineering or related field.
• Over 10 years of experience in logic design or circuit design for non-volatile memory technologies.
• More than 5 years of experience in a technical leadership role with strong team leadership.
• Proficient in using EDA tools and methodologies for both custom and digital design of non-volatile memory.

Aufgaben

• Define, explore, and document the architecture and micro-architecture of RTL designs based on specified requirements.
• Collaborate with circuit design and product engineering teams to clarify macro interfaces, testing and manufacturing requirements.
• Implement the defined architecture and micro-architecture using synthesizable Verilog or System Verilog, adhering to coding guidelines.
• Develop and document a comprehensive verification plan, implementing it through Verilog, SystemVerilog, and preferably UVM.
• Demonstrate proficiency with at least one linting tool; specify SDC for synthesis and P&R; perform logic synthesis and LEC/STA checks.
• Identify design and design flow problems suitable for automation; develop automation scripts in Python, C/C++, or other languages.
• Special Tasks: Conduct CDC and RDC checks and collaborate to debug and validate test chips.

Kenntnisse

Leadership

Team management

Problem solving

Ausbildung

Master's degree in Electrical Engineering

Tools

Design Compiler

Cadence

Python scripting

Verilog/SystemVerilog

Jobbeschreibung

Taiwan Semiconductor Manufacturing Company Ltd. (“TSMC”) is the world’s leading semiconductor foundry. Headquartered in Taiwan, the Company has operation facilities worldwide and the largest logic chip manufacturing capacity in global semiconductor industry. The Company employs a global workforce of over 89.000 and recorded revenue over US$122 billion in 2025. TSMC produces the chips that are found in smart phones, tablets, computers, smart TVs, cars, laptops, games consoles, data centers and many more applications. TSMC sells to a wide variety of customers, including most leading semiconductor companies.

At the TSMC EU Design Center, you’ll work in an exceptional technology and design team to refine your technical and leadership skills within the world's most advanced design service ecosystem. You'll be contributing to the forefront of semiconductor technology, including cutting-edge nonvolatile memory solutions like MRAM and RRAM. Your main focus will be to assist our leading customers in delivering state-of-the-art products that have a transformative impact on people's lives.

Job Responsibilities

Lead a team in the development of embedded nonvolatile memory test chips and intellectual property (IP).

The Primary Responsibilities Include

• Define, explore, and document the architecture and micro-architecture of RTL designs based on specified requirements.
• Collaborate with circuit design and product engineering teams to clarify macro interfaces, as well as testing and manufacturing requirements.
• Implement the defined architecture and micro-architecture using synthesizable Verilog or System Verilog, adhering to established coding guidelines.
• Develop and document a comprehensive verification plan, implementing it through Verilog, System Verilog, and preferably UVM.
• Demonstrate proficiency with at least one linting tool. Collaborate with the P&R team to specify SDC for synthesis and P&R, perform logic synthesis (using tools such as Design Compiler or Cadence), and conduct LEC (Logic Equivalency Checking) and STA analysis.
• Identify design and design flow problems suitable for automation. Specify and document the input specifications and automation programs/utilities. Develop programs/scripts for automation using Python, C/C++, or other common scripting languages.
• Special Tasks: Conduct Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) checks and design. Collaborate with circuit teams, product engineering, and test engineering to debug and validate the test chip.

Job Qualifications

• Master's degree or above in Electrical Engineering or a related field.
• Over 10 years of experience in logic design or circuit design for non-volatile memory technologies, including flash memory, RRAM, MRAM, or PCRAM.
• More than 5 years of experience in a technical leadership role, demonstrating strong team leadership and problem-solving skills.
• Proficient in using EDA tools and methodologies for both custom and digital design of non-volatile memory.

Only the applications relevant to the criteria above will be taken for further consideration.

TSMC Core Values

At TSMC, We Invite Talented Individuals Who Share Our Vision And Values To Contribute To Our Continued Success. Our Core Values Are The Foundation Of Our Culture, Guiding Every Decision And Action. We Seek Applicants Who Deeply Resonate With These Principles And Embody Them In Their Work

• Integrity: Tell the truth. We do not brag. We do not make commitments lightly. Once we make a commitment, we devote ourselves completely to meeting that commitment.
• Commitment: Employees are dedicated to the company, view the company’s success as their own and work diligently to make their best contributions. As commitment is mutual, the Company strives to serve the best interests of its employees.
• Innovation: Innovation is the wellspring of the Company's growth. It means more than new ideas; it means putting ideas into practice.
• Customer Trust: We strive to build deep and enduring relationships with our customers, who trust and rely on us to be part of their success over the long term.

(For more details on TSMC’s Core Values, please visit：https://www.tsmc.com/english/aboutTSMC/values)

It is the policy of TSMC EU to provide equal employment opportunity (EEO) to all persons regardless of age, color, ethnic and national origin, citizenship status, physical or mental disability, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, genetic information, marital status, status with regard to public assistance, veteran status, or any other characteristic protected by federal, state or local law.