AI Memory Design Manager

TSMC - Taiwan Semiconductor Manufacturing Company Limited; München; Vor Ort; EUR 120.000 - 160.000; Vollzeit

Zusammenfassung

TSMC - Taiwan Semiconductor Manufacturing Company Limited in Munich is seeking an experienced Memory Design engineer to develop and optimize memory test chips and IP for AI applications on TSMC processes.

You will conduct circuit design and RTL coding, verify designs, review layout reports, and collaborate on test chip implementation, silicon characterization, and reliability qualification. A Master’s degree and 10+ years in memory design are required; AI experience is a strong advantage.

Qualifikationen

• Master’s degree or higher in Electrical Engineering or related field.
• 10+ years in circuit/logic design for non-volatile memory tech.
• 5+ years in compute-in-memory or AI algorithms is a strong advantage.
• Proficient in utilizing EDA tools and applying design methodologies for both custom and digital design of non-volatile memory.

Aufgaben

• Develop memory test chips and IP including circuit design or RTL coding.
• Perform design verification and review layout reports.
• Prepare comprehensive design reports and collaborate on test chip implementation.
• Assist with silicon characterization and reliability qualification.
• Provide technical support to customers.

Kenntnisse

Circuit design

Non-volatile memory

RTL design

AI algorithms

Ausbildung

Master's degree in Electrical Engineering

Tools

EDA tools

Design methodologies

Jobbeschreibung

Your work will drive chip innovation by developing and optimizing all aspects of the pre‑silicon design flow, including:

• Developing memory IP and compilers targeting AI applications optimized for TSMC processes.
• Designing test chips to validate memory IP.
• Conducting rigorous testing to ensure the reliability and scalability of developed solutions.

Responsibilities

You will be responsible for developing memory test chips and IP including:

• Conducting circuit design or RTL coding.
• Performing design verification.
• Reviewing and verifying layout reports.
• Preparing comprehensive design reports.
• Collaborating on test chip implementation.
• Assisting with silicon characterization and reliability qualification.
• Contributing to front‑end and back‑end design kit generation.
• Analyzing and debugging silicon data.
• Providing technical support to customers.

Qualifications

Qualifications include:

• Master’s degree or higher in Electrical Engineering or a related field.
• Over 10 years of experience in circuit or logic design for non‑volatile memory technologies, including flash memory, RRAM, MRAM, or PCRAM.
• Over 5 years of experience in compute‑in‑memory or AI algorithms is considered a strong advantage.
• Proficient in utilizing EDA tools and applying design methodologies for both custom and digital design of non‑volatile memory.