Senior Physical Design Engineer for High-Speed FinFET Tapeout

Kandou Bus SA; Saint-Sulpice; Vor Ort; CHF 120.000 - 180.000; Vollzeit

Zusammenfassung

Kandou Bus SA in Lausanne, Switzerland, seeks a Physical Design Engineer to drive block-level implementation for advanced FinFET nodes. You will own synthesis, floorplanning, placement, CTS, and routing while meeting tight PPA targets.

Ideal candidates have 5+ years in physical design, strong SDC expertise, and a background in low-power techniques and hierarchical chip integration. Immediate start and permanent role.

Qualifikationen

• 5+ years of hands-on physical design experience (synthesis, SDC, CTS, place and route).
• Deep CMOS/FinFET knowledge, crosstalk, and high-frequency clock networks.
• Experience with low-power methods (UPF, power gating).
• Tape-out experience in advanced nodes (7nm/5nm/3nm).
• Experience with block-to-chip hierarchical design and top-level routing.

Aufgaben

• Own block synthesis, floorplanning, placement, CTS, and routing for blocks.
• Develop and refine SDC constraints to match physical realization.
• Collaborate with the digital design team to resolve P&R bottlenecks.
• Generate progress reports and sign-off packages for tape-out.
• Maintain design flows and documentation.

Kenntnisse

Physical design

Scripting (Tcl, Python)

Timing analysis

Floorplanning

CAD tooling

Ausbildung

Master’s or PhD in E.E./Communications

Tools

Cadence Genus/Innovus/Tempus

Synopsys Design Compiler/ICC2/PrimeTime

Calibre

Jobbeschreibung

Kandou Bus SA in Lausanne, Switzerland, seeks a Physical Design Engineer to drive block-level implementation for advanced FinFET nodes. You will own synthesis, floorplanning, placement, CTS, and routing while meeting tight PPA targets.

Ideal candidates have 5+ years in physical design, strong SDC expertise, and a background in low-power techniques and hierarchical chip integration. Immediate start and permanent role.