Senior Custom Design Engineer

IC Resources; Zürich; Vor Ort; CHF 120.000 - 170.000; Vollzeit

Zusammenfassung

IC Resources is seeking a Senior Custom Design Engineer in Zürich, Switzerland to design and deliver high-performance, low-power SRAM and custom digital sub-systems for compute-in-memory tech. You will own architecture, circuit implementation, verification, and silicon correlation for sub-5 nm nodes, collaborating with cross-functional teams to meet tight PPA goals.

The role requires a Master’s or PhD in EE/CE and 5+ years in custom digital/SRAM design; strong communication and self-directed

Qualifikationen

• Master’s or PhD in Electrical or Computer Engineering.
• Minimum of 5 years of experience in custom digital, analog, or SRAM design.
• Proven ownership of complete design cycles for sub-blocks.
• Strong expertise in high-performance and low-power circuit design on FinFET nodes, including bitcell stability and periphery trade-offs.
• Excellent communication skills with the ability to define and articulate clear interfaces and constraints across teams.
• A self-directed, organized, and delivery-oriented approach to work.

Aufgaben

• Designing and verifying embedded SRAM or custom digital blocks, such as caches, register files, datapath, and datapath-adjacent interfaces.
• Optimising performance, power, and area (PPA) on advanced nodes, addressing variation and stability closure, corners, Monte Carlo simulations, and power reduction.
• Defining clean digital boundaries and timing budgets to ensure seamless integration into a digital-on-top flow.
• Planning and executing silicon correlation, including bring-up, characterization benches, analysis of ATE data, and resolving errata.
• Collaborating with layout teams on floorplanning, guarding, shielding, and routing topology, as well as resolving EM/IR issues.
• Enhancing methodologies through scripting for characterization, regression, and reporting (using Python or Tcl), and contributing to specifications, checklists, and reusable collateral

Kenntnisse

SRAM design

Custom digital design

FinFET design

Low-power design

Circuit verification

Python scripting

Tcl scripting

Team communication

Ausbildung

Master's degree in Electrical or Computer Engineering

PhD in Electrical or Computer Engineering

Tools

Python

Tcl

Jobbeschreibung

My client is seeking a highly skilled and experienced Senior Custom Design Engineer to join their innovative team in Zürich, Switzerland. This role offers a unique opportunity to design and deliver high-performance, low-power SRAM and custom-digital sub-systems that form the backbone of cutting-edge compute-in-memory technology. The successful candidate will play a pivotal role in architecture, circuit implementation, verification, and silicon correlation for advanced nodes, including sub-5 nm technologies. This is a challenging and rewarding position for a professional with a passion for advanced circuit design and optimisation.

Responsibilities

• Designing and verifying embedded SRAM or custom digital blocks, such as caches, register files, datapath, and datapath-adjacent interfaces
• Optimising performance, power, and area (PPA) on advanced nodes, addressing variation and stability closure, corners, Monte Carlo simulations, and power reduction
• Defining clean digital boundaries and timing budgets to ensure seamless integration into a digital-on-top flow
• Planning and executing silicon correlation, including bring-up, characterization benches, analysis of ATE data, and resolving errata
• Collaborating with layout teams on floorplanning, guarding, shielding, and routing topology, as well as resolving EM/IR issues
• Enhancing methodologies through scripting for characterization, regression, and reporting (using Python or Tcl), and contributing to specifications, checklists, and reusable collateral

Qualifications

• A Master’s or PhD degree in Electrical or Computer Engineering
• A minimum of 5 years of experience in custom digital, analog, or SRAM design
• Proven ownership of complete design cycles for sub-blocks
• Strong expertise in high-performance and low-power circuit design on FinFET nodes, including bitcell stability and periphery trade-offs
• Excellent communication skills with the ability to define and articulate clear interfaces and constraints across teams
• A self-directed, organized, and delivery-oriented approach to work

Join us in shaping the future of compute-in-memory technology!