Senior Low-Power AI ASIC Architect

Qualcomm; Markham; On-site; CAD 151,000 - 221,000; Full time

Job summary

Qualcomm Canada ULC is seeking an ASIC Design Engineer to help shape ultra-low power AI subsystems in audio. You will develop micro-architecture, write Verilog RTL, and collaborate across SoC teams to optimize performance, area and power.

The role emphasizes power analysis, scripting, and post-silicon support, with growth opportunities and a strong benefits program. This is a Canada-based, on-site position linked to the ASICS Engineering group.

Qualifications

• 2+ years of professional industry ASIC hardware design and/or implementation experience.
• Verilog/VHDL RTL design languages and ability to write clean, readable, synthesizable RTL.
• Understanding of ASIC/VLSI concepts
• Experience in logic synthesis using Synopsis and/or Cadence tools.
• Ability to work legally in Canada

Responsibilities

• Develop micro-architecture and module specifications for digital audio and AI IP blocks including those that interface with the SoC
• Implement modules and sub-systems and integrate IP from other teams in Verilog RTL
• Analyze performance, area, power, and system cost tradeoffs for different implementations
• Review opportunities for power optimization for ultra-low power designs
• Power projection activities, what/if scenario exploration
• Work with the design verification team to debug tests at the module, sub-system and SoC levels throughout the ASIC development cycle (pre and post-silicon)
• Work with the implementation team to review synthesis results, review power metrics and reach static timing closure
• Analysis with silicon debug team to correlate stated objectives for both function and power

Skills

ASIC hardware design

Verilog/VHDL RTL design

ASIC/VLSI concepts

Power analysis & low power RTL design

Clock domain crossing techniques

C coding

Python scripting

UVM

Bus protocols (APB, AHB, AXI)

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field and 1+ years of ASIC design, verification, or related work experience.

PhD in Science, Engineering, or related field

Tools

Synthesis tools (Synopsys/Cadence)

Spyglass

Formality

Primetime

Modeltech

Power Compiler

Job description

Qualcomm Canada ULC is seeking an ASIC Design Engineer to help shape ultra-low power AI subsystems in audio. You will develop micro-architecture, write Verilog RTL, and collaborate across SoC teams to optimize performance, area and power.

The role emphasizes power analysis, scripting, and post-silicon support, with growth opportunities and a strong benefits program. This is a Canada-based, on-site position linked to the ASICS Engineering group.