Senior ASIC Implementation Engineer, Low Power AI

Qualcomm; Markham; On-site; CAD 163,000 - 233,000; Full time

Job summary

Qualcomm Technologies Audio division seeks an ASIC Implementation Engineer to deliver ultra-low power, high-performance audio subsystems. You will drive RTL design, synthesis, and timing constraints, while validating power intent and performing STA and CDC checks.

The role involves modeling tradeoffs across architectures and collaborating to refine implementation flows. Applicants should have 2+ years in ASIC design/verification, strong Verilog/VHDL, and experience with Synopsys/Cadence

Qualifications

• Bachelor's degree in Science or Engineering with 2+ years of ASIC design/verification.
• Strong RTL coding in Verilog/VHDL and clean, synthesizable RTL.
• Experience with Synopsys or Cadence toolflows and power analysis.
• Knowledge of UPF and low-power ASIC design concepts is a plus.
• Detail oriented with analytical and debugging skills.

Responsibilities

• Synthesize, implement timing constraints, and create ECOs.
• Power intent validation and STA, lint, and CDC checks.
• Model and analyze performance, area, power tradeoffs.
• Contribute to implementation methodologies and flows.
• May perform RTL development tasks in addition to responsibilities.

Skills

Verilog/VHDL RTL

Power analysis

Synthesis

Clock domain crossing

Scripting (Python, PERL, TCL)

Education

Bachelor's degree in Engineering/Science

Master's degree in Engineering/Science

PhD in Engineering/Science

Tools

Synopsys

Cadence

Power/Timing analysis tools

Job description

General Summary

What we are doing what has not been done.

Shape the future of low power AI subsystems.

Push the boundaries on features and performance.

Qualcomm Technologies Audio products are designed to offer premium wireless connectivity, high levels of integration, immersive sound quality, and on-device AI for smart audio and context aware applications. An ultra-low power subsystem within a low power SoC; a chip-within-a-chip HW block incorporating multiple always-on IP's, design execution within this group requires solving ground-breaking challenges and multiple power domain crossing issues.

As we are pioneer new and/or improved functionality, innovate to minimize power consumption. Make a difference, join a team on the cutting edge and become an integral part of Qualcomm’s growth and momentum.

We are looking for an ASIC Implementation Engineer to be part of our team to innovate and design complex leading, ultra-low power, solutions for audio and context aware applications. We are open to all levels of applicants, with responsibility being commensurate with experience. We are looking for applicants who thrive when presented with constant opportunities for learning and growth and who want to have a large impact on our team. New Position

Key ASIC Implementation Tasks

• Synthesis
• Timing Constraints
• Implementing ECOs
• STA
• Power intent validation (CLP)
• Lint
• Power Analysis Tasks
• CDC validation
• Model and analyze performance, area, power, and system cost tradeoffs for different micro-architectures
• Contribute to implementation methodologies/ flows

Specific Responsibilities (Initial Focus)

• CLP (RTL and/or netlist)
• PTPX / power pro
• Power analysis / optimization

In addition to implementation tasks the successful candidate may also be asked to perform ASIC design tasks including some RTL development.

Requirements

• 2 years of professional ASIC hardware design and/or implementation experience.
• Expertise with Verilog/VHDL RTL design languages and ability to write clean, readable, synthesizable RTL.
• Exceptional understanding of ASIC/VLSI concepts
• Experience in logic synthesis using Synopsis and/or Cadence tools.
• Detail oriented with strong analytical and debugging skills

Preferred Qualifications

• Strong communication (written and verbal) and collaboration skills
• Working knowledge of UPF specification
• Experience with synthesis, STA
• Experience with High-speed/Low power ASIC design within a Unix environment
• Experience with clock domain crossing techniques and tools
• Scripting skills (Python , PERL, TCL or C)

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, or related work experience.
• Master's degree in Science, Engineering, or related field and 1+ years of ASIC design, verification, or related work experience.
• PhD in Science, Engineering, or related field.

Equal Opportunity Statement

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits

$115,600.00 - $165,600.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.