Senior ASIC Verification Engineer — AI/DSP NPU

Qualcomm

Markham

On-site

CAD 124,200 - 174,200

Full time

14 days+

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Benefits offered by this job

Competitive benefits package
RSU grants

Job summary

Qualcomm Canada ULC is seeking ASIC Design Verification Engineers to join a compact, expert team focused on Snapdragon DSP processors. You will verify complex IP blocks, write tests in SystemVerilog, and contribute to testbench architecture while collaborating closely with design and verification teams to achieve high-quality silicon.

New grads to senior staff are welcome; roles vary by experience. The team emphasizes strong problem solving, communication, and self-motivation in a fast-paced

Qualifications

  • Bachelor's degree in Science, Engineering, or related field with 4+ years in ASIC design/verification
  • Master's degree with 3+ years of related experience or PhD with 2+ years
  • Proficiency in ASIC verification methodologies (UVM, coverage-driven, constrained-random)
  • Experience with SystemVerilog testbench components and scripting

Responsibilities

  • Verify a complex IP block using UVM methodology
  • Collaborate with Design team to test, debug and close coverage
  • Modify testbench components to verify new features
  • Write tests in SystemVerilog and create assertions/coverage
  • Maintain regression and triage failures
  • Contribute to testbench architecture and verification methodology
  • Assist integration testing and performance testing

Skills

Problem solving
Analytical thinking
Communication skills
Self-motivated
Team player

Education

Bachelor's in Engineering/Computer Engineering
Master's in Science/Engineering
PhD in Science/Engineering

Tools

SystemVerilog
Python
CShell

Job description

Qualcomm Canada ULC is seeking ASIC Design Verification Engineers to join a compact, expert team focused on Snapdragon DSP processors. You will verify complex IP blocks, write tests in SystemVerilog, and contribute to testbench architecture while collaborating closely with design and verification teams to achieve high-quality silicon.

New grads to senior staff are welcome; roles vary by experience. The team emphasizes strong problem solving, communication, and self-motivation in a fast-paced

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Senior ASIC Design Verification Engineer, Compute DSP/AI Processors (multiple levels)
Senior ASIC Design Verification Engineer, Compute DSP/AI Processors (multiple levels)

Qualcomm • Markham

On-site
CAD 124,200 - 174,200
Competitive benefits package
RSU grants
Senior Low-Power AI ASIC Verification Lead
Senior Low-Power AI ASIC Verification Lead

QUALCOMM, Inc. • Markham

On-site
CAD 108,000 - 180,000
Senior ASIC Verification Engineer — UVM & SystemVerilog
Senior ASIC Verification Engineer — UVM & SystemVerilog

Qualcomm • Markham

On-site
CAD 130,000 - 180,000
RSU grants
Annual discretionary bonus
Benefits package
Senior ASIC Design Engineer, Compute DSP/AI Processors (multiple levels)
Senior ASIC Design Engineer, Compute DSP/AI Processors (multiple levels)

Qualcomm • Markham

On-site
CAD 124,200 - 174,200
Senior FPGA/ASIC Verification Architect
Senior FPGA/ASIC Verification Architect

QUALCOMM, Inc. • Ottawa

On-site
CAD 120,000 - 180,000
Lead ASIC/FPGA Verification Engineer
Lead ASIC/FPGA Verification Engineer

QUALCOMM, Inc. • Ottawa

On-site
CAD 90,000 - 135,000
AI-Accelerated Digital Design Verification Engineer
AI-Accelerated Digital Design Verification Engineer

Qualcomm • Toronto

Hybrid
CAD 130,000 - 180,000
Intern, DSP/AI Processor HW Design & Verification
Intern, DSP/AI Processor HW Design & Verification

Qualcomm • Markham

On-site
CAD 55,000 - 103,000
Housing stipend
Staff Verification Engineer, Compute Subsystems
Staff Verification Engineer, Compute Subsystems

Qualcomm • Markham

On-site
CAD 130,000 - 180,000
RSU grants
Annual discretionary bonus
Benefits package
ASIC/FPGA Design Verification Engineer, Sr Staff
ASIC/FPGA Design Verification Engineer, Sr Staff

QUALCOMM, Inc. • Ottawa

On-site
CAD 120,000 - 155,000