Senior ASIC Design Engineer, Low Power AI

Qualcomm; Markham; On-site; CAD 151,000 - 221,000; Full time

Job summary

Qualcomm Canada ULC is seeking an ASIC Design Engineer to help shape ultra-low power AI subsystems in audio. You will develop micro-architecture, write Verilog RTL, and collaborate across SoC teams to optimize performance, area and power.

The role emphasizes power analysis, scripting, and post-silicon support, with growth opportunities and a strong benefits program. This is a Canada-based, on-site position linked to the ASICS Engineering group.

Qualifications

• 2+ years of professional industry ASIC hardware design and/or implementation experience.
• Verilog/VHDL RTL design languages and ability to write clean, readable, synthesizable RTL.
• Understanding of ASIC/VLSI concepts
• Experience in logic synthesis using Synopsis and/or Cadence tools.
• Ability to work legally in Canada

Responsibilities

• Develop micro-architecture and module specifications for digital audio and AI IP blocks including those that interface with the SoC
• Implement modules and sub-systems and integrate IP from other teams in Verilog RTL
• Analyze performance, area, power, and system cost tradeoffs for different implementations
• Review opportunities for power optimization for ultra-low power designs
• Power projection activities, what/if scenario exploration
• Work with the design verification team to debug tests at the module, sub-system and SoC levels throughout the ASIC development cycle (pre and post-silicon)
• Work with the implementation team to review synthesis results, review power metrics and reach static timing closure
• Analysis with silicon debug team to correlate stated objectives for both function and power

Skills

ASIC hardware design

Verilog/VHDL RTL design

ASIC/VLSI concepts

Power analysis & low power RTL design

Clock domain crossing techniques

C coding

Python scripting

UVM

Bus protocols (APB, AHB, AXI)

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field and 1+ years of ASIC design, verification, or related work experience.

PhD in Science, Engineering, or related field

Tools

Synthesis tools (Synopsys/Cadence)

Spyglass

Formality

Primetime

Modeltech

Power Compiler

Job description

Company

Qualcomm Canada ULC

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

What we are doing has not been done. Shape the future of low power AI subsystems. Push the boundaries on features and performance. Qualcomm Technologies Audio products are designed to offer premium wireless connectivity, high levels of integration, immersive sound quality, and on-device AI for smart audio and context aware applications. An ultra-low power subsystem within a low power SoC; a chip-within-a-chip HW block incorporating multiple always-on IP's, design execution within this group requires solving ground-breaking challenges and multiple power domain crossing issues. As we deliver to the premium tiers of the mobile, compute, automotive, and IoT markets, we strive to pioneer new and/or improved functionality and innovate to minimize power consumption. Make a difference, join a team on the cutting edge and become an integral part of Qualcomm’s growth and momentum. We are looking for an ASIC Design Engineer that will work with industry leading edge HW Design technology and processes and provide expertise for next generation initiatives. As a leader in delivering ultra-low power solutions, there will also be an emphasis on power analysis and optimization. New position.

The Candidate’s Responsibilities Would Include

• Develop micro-architecture and module specifications for digital audio and AI IP blocks including those that interface with the SoC
• Implement modules and sub-systems and integrate IP from other teams in Verilog RTL
• Analyze performance, area, power, and system cost tradeoffs for different implementations
• Review opportunities for power optimization for ultra-low power designs
• Power projection activities, what/if scenario exploration
• Work with the design verification team to debug tests at the module, sub-system and SoC levels throughout the ASIC development cycle (pre and post-silicon)
• Work with the implementation team to review synthesis results, review power metrics and reach static timing closure
• Analysis with silicon debug team to correlate stated objectives for both function and power

Minimum Qualifications

• 2+ years of professional industry ASIC hardware design and/or implementation experience.
• Verilog/VHDL RTL design languages and ability to write clean, readable, synthesizable RTL.
• Understanding of ASIC/VLSI concepts
• Experience in logic synthesis using Synopsis and/or Cadence tools.
• Ability to work legally in Canada

Preferred Qualifications

• Experience with power analysis, power modeling and low power RTL design.
• Experience with clock domain crossing techniques
• Power and performance experience with an audio IP core, DSP, various audio interfaces (I2S, PCM, SLIMbus, SoundWire, Audio Codec) and accelerators (low-power AI/ML inference).
• Experience with a subset of DC, FC, PTPX, Power Compiler, Primetime, Modeltech, VCS, power theatre, etc.)
• Experience with design rule check (Spyglass, etc.), Formal verification (Formality, LEC, etc.) and/or Power analysis and simulation
• Scripting skills (Python , PERL, TCL or C)
• Knowledge of bus interface protocols (APB, AHB, AXI)
• Experience with post-silicon debug
• Experience with UVM
• C coding

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, or related work experience.
• Master's degree in Science, Engineering, or related field and 1+ years of ASIC design, verification, or related work experience.
• PhD in Science, Engineering, or related field.

Applicants

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay Range And Other Compensation & Benefits

$108,000.00 - $158,000.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.