Senior FPGA/ASIC Verification Architect

QUALCOMM, Inc.; Ottawa; On-site; CAD 120,000 - 180,000; Full time

Job summary

Qualcomm Canada ULC is seeking an experienced Senior Staff ASIC/FPGA Design Verification Engineer in Ottawa. You will define and verify IP blocks and subsystems for high-speed interconnects, collaborate with architecture, design and software teams, and mentor engineers to uphold verification best practices.

The role emphasizes leadership in verification architectures, test planning, and advanced AI-inspired verification methods, with a focus on delivering reliable, high-performance hardware IP

Qualifications

• MSc/MEng with 7+ years of ASIC/FPGA design and verification experience.
• BSc/BEng with 10+ years of ASIC/FPGA experience.
• PhD with 4+ years of ASIC design/verification experience.

Responsibilities

• Deliver IP blocks and subsystems for PCIe Gen7, CXL 4.0, UALink, Ethernet and related interconnects.
• Provide technical leadership for verification across IP, subsystem, and system levels.
• Architect and document scalable verification environments using SystemVerilog and UVM.
• Develop verification plans and drive closure to meet coverage goals.
• Drive debugging, bug tracking and root-cause analysis through to resolution.
• Collaborate with architecture, design, software and validation teams.

Skills

SystemVerilog

UVM

Constrained-random

Coverage-driven verification

High-speed interconnect

Technical leadership

Communication

Problem-solving

Education

MSc/MEng or higher in relevant field

BSc/BEng in relevant field

PhD in Science/Engineering (optional)

Tools

Siemens/Avery PCIe VIP

Cadence PCIe VIP

Synopsys PCIe VIP

Job description

Qualcomm Canada ULC is seeking an experienced Senior Staff ASIC/FPGA Design Verification Engineer in Ottawa. You will define and verify IP blocks and subsystems for high-speed interconnects, collaborate with architecture, design and software teams, and mentor engineers to uphold verification best practices.

The role emphasizes leadership in verification architectures, test planning, and advanced AI-inspired verification methods, with a focus on delivering reliable, high-performance hardware IP