Senior ASIC Verification Engineer — UVM & SystemVerilog

Qualcomm; Markham; On-site; CAD 130,000 - 180,000; Full time

Benefits offered by this job

RSU grants

Annual discretionary bonus

Benefits package

Job summary

Qualcomm Canada ULC seeks a strong ASIC design verification engineer to join our AI HW team in Markham, Ontario, developing world-class ML hardware solutions.

You will work with design and verification leads to build verification environments in UVM/SystemVerilog, write tests, develop a C reference model, and drive coverage and performance checks within a collaborative engineering group.

Qualifications

• Bachelor's degree with 4+ years ASIC design/verification experience.
• Master's degree with 3+ years ASIC design/verification experience.
• PhD with 2+ years ASIC design/verification experience.

Responsibilities

• Develop verification strategy and test plan for multimedia and compute subsystems.
• Create verification environment using UVM/SystemVerilog.
• Write tests and regressions to identify bugs and mentor juniors.

Skills

UVM

SystemVerilog

Digital design concepts

Bus protocols AXI/AHB

Perl scripting

Python scripting

Testbench development

Education

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Tools

C reference model

Job description

Qualcomm Canada ULC seeks a strong ASIC design verification engineer to join our AI HW team in Markham, Ontario, developing world-class ML hardware solutions.

You will work with design and verification leads to build verification environments in UVM/SystemVerilog, write tests, develop a C reference model, and drive coverage and performance checks within a collaborative engineering group.