ASIC/FPGA Design Verification Engineer, Sr Staff

QUALCOMM, Inc.; Ottawa; On-site; CAD 120,000 - 155,000; Full time

Job summary

Qualcomm Canada ULC is seeking a Senior Staff ASIC/FPGA Design Verification Engineer to deliver high-performance IP blocks and interconnect ASICs/FPGAs. You will lead verification across IP, subsystem, and system levels, architect scalable verification environments using SystemVerilog and UVM, and drive test plans, coverage, and closure.

You will mentor engineers, collaborate with architecture, design, software, and validation teams, and contribute to continuous improvement in verification

Qualifications

• Minimum Qualifications: MSc/MEng with 7+ years in ASIC/FPGA development and verification, or BSc/BEng with 10+ years, or PhD with 4+ years.
• Expertise in high-speed interconnect protocols (PCIe, CXL, UALink, Ethernet) and verification methodologies.
• Strong technical leadership, mentoring, and cross-functional collaboration skills.

Responsibilities

• Deliver standards-compliant IP blocks and subsystems for PCIe Gen7, CXL 4.0, UALink, Ethernet, and future interconnects.
• Provide technical leadership for verification across IP, subsystem, and system levels.
• Architect and document scalable verification environments using SystemVerilog and UVM.

Skills

Technical leadership

Mentoring

Communication

Problem-solving

Cross-functional collaboration

Education

Master's degree (MSc/MEng)

Bachelor's degree (BSc/BEng)

PhD

Tools

SystemVerilog

UVM

Constrained-random

Coverage-driven verification

Job description

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Replacement Position

Senior Staff ASIC/FPGA Design Verification Engineer

What You'll Do

• Deliver standards-compliant IP blocks and subsystems for PCIe Gen7 (and beyond), CXL 4.0 (and beyond), UALink, Ethernet, and next-generation high-speed interconnect ASICs and FPGAs.
• Provide technical leadership for verification activities across IP, subsystem, and system-level designs.
• Architect, develop, and document scalable verification environments using SystemVerilog and UVM.
• Develop comprehensive verification test plans and drive verification closure.
• Develop, debug, and optimize complex test cases to achieve functional and coverage goals.
• Drive bug tracking, root-cause analysis, and issue resolution from discovery through closure.
• Improve engineering productivity through advanced tools, AI-driven verification techniques, automation, and scripting solutions.
• Collaborate closely with architecture, design, software, validation, and customer teams to ensure successful product execution.
• Mentor junior and senior engineers, promoting technical excellence and verification best practices across the organization.

What You'll Need

• MSc/MEng with 7+ years of experience, or BSc/BEng with 10+ years of experience in ASIC or FPGA development and verification.
• Deep knowledge of high-speed communication and interconnect protocols such as PCIe, CXL, UALink, and Ethernet.
• Expert-level experience with SystemVerilog, UVM, constrained-random, and coverage-driven verification methodologies.
• Strong understanding of IP, subsystem, and SoC-level verification.
• Extensive experience with simulation, debugging, verification closure, functional coverage, and assertion-based verification.
• Excellent technical leadership, communication, and problem-solving skills.
• Ability to influence technical direction and drive alignment across cross-functional teams.

It'd Be Amazing If You Had

• Experience with PCIe Gen5/6/7 or CXL 3.0/4.0 from Physical Layer through Transaction Layer.
• Experience with UALink and next-generation AI/HPC interconnect technologies.
• Experience using PCIe/CXL VIPs from Siemens/Avery, Cadence, or Synopsys.
• Experience leveraging AI-based approaches to improve verification productivity, test generation, debug, and coverage closure.
• Experience with formal verification, emulation, or FPGA prototyping.
• Experience defining or deploying verification methodologies used across multiple projects or teams.

About You

• Recognized as a technical leader who drives execution and delivers results.
• Strong mentoring and coaching skills with a passion for developing engineers.
• Detail-oriented with exceptional analytical and problem-solving abilities.
• Committed to engineering excellence, quality, and continuous improvement.
• Self-motivated, self-managing, and accountable for project outcomes.

Applicants:

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

If you would like more information about this role, please contact Qualcomm Careers.