RTL Design Engineer, Sr Staff

Qualcomm; Toronto; On-site; CAD 100,000 - 130,000; Full time

Benefits offered by this job

Competitive compensation

Career growth opportunities

High-impact, fast-paced environment

Job summary

Qualcomm in Toronto, Canada, is searching for an ASIC Engineer who will define, model, design, optimize, and verify IP development for world-class products. The ideal candidate has extensive experience in RTL SoC Design and works in a collaborative, fast-paced environment.

You will be responsible for developing high-performance systems, integrating designs with SOC Architects, and ensuring quality through rigorous verification processes. Qualcomm offers competitive compensation and opportunities for career growth.

Qualifications

• Strong background with multi-year and multi-project experience in RTL SoC Design.
• Experience in SerDes PHY, DSP, and Analog mixed signal is desirable.
• Comprehensive understanding of timing closure.

Responsibilities

• Micro architect and RTL Design of SoC SubSystem/IP blocks.
• Develop UPF and run CLP checks.
• Create appropriate documentation for hardware blocks.
• Analyse, debug and fix issues reported by verification team.

Skills

RTL SoC Design (Verilog/VHDL)

ASIC/FPGA debug methodologies

SerDes PHY

DSP

Analog mixed signal

Design Compiler Synthesis

formal verification using LEC

timing closure

Team player with strong communication skills

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

Verilog

VHDL

Design Compiler

Job description

Company: Qualcomm Canada ULC

Job Area: Engineering Group, Engineering Group > ASICS Engineering

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next‑generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross‑functional groups to determine product execution path.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Why Join Us?

• Work on cutting‑edge SoC designs in advanced process nodes.
• Products purpose‑built for AI datacenter scale out and scale up connectivity.
• Work in a high‑impact, fast‑paced environment.
• Competitive compensation and career growth opportunities.
• Work alongside some of the best minds in the semiconductor industry.

What You'll Do

• Micro architect and RTL Design of SoC SubSystem/IP blocks.
• Develop UPF and run CLP checks.
• Responsible for RTL quality checks - Lint/CDC/LEC.
• Create appropriate documentation for hardware blocks.
• Analyse, debug and fix issues reported by verification team.
• Develop the synthesis constraints for the blocks / subsystem.
• Work with SOC Architect/Leads to integrate the design, review/sign‑off verification plan, DFT and PD implementation.

What You'll Need

• Strong background with multi‑year and multi‑project experience in RTL SoC Design (Verilog/VHDL), and ASIC/FPGA debug methodologies.
• Experience in SerDes PHY, DSP, and Analog mixed signal is desirable.
• Knowledge in Ethernet and PCIe standards is desirable.
• Proficient in reviewing high‑level test plans and coverage metrics.
• Expertise in Design Compiler Synthesis and formal verification using LEC.
• Comprehensive understanding of timing closure.
• Experience in post‑silicon bring‑up and debugging.
• Team player with strong communication skills to ensure effective program execution.

It Would Be Amazing If You Had

• Ability to develop architecture and micro‑architecture based on specifications.
• Knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc.
• Experience with memory controller designs and microprocessors is an advantage.
• Knowledge of chip IO design and packaging is beneficial.

Equal Opportunity Employer

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑[e-mail] or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this e‑mail address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).