Analog Engineer, Principal

Qualcomm; Toronto; On-site; CAD 160,000 - 230,000; Full time

Job summary

Qualcomm Canada ULC is seeking an engineer to oversee design, verification, and documentation of CMOS analog/mixed-signal blocks such as data converters, PLLs, and ADCs. You’ll participate from system definition through layout and silicon evaluation, using Cadence and MATLAB, with emphasis on high performance and reliability in a collaborative team.

The candidate should hold a PhD/MSc/BSc in Electrical Engineering and bring 6–8+ years of ASIC experience, including transistor-level design and

Qualifications

• PhD/MSc/BSc with ASIC design, verification, or related experience as stated in the ad.
• Experience with transistor-level circuit design using advanced CMOS nodes.
• Familiarity with SPICE and Verilog-A for analog behavioural modeling.

Responsibilities

• Collaborate with world-class engineers to meet design goals.
• Ensure analog block performance adheres to specifications.
• Refine circuit implementations to optimize power, performance, and area.
• Propose design and verification strategies for high-quality results.
• Oversee layout to minimize parasitics and variation impacts.
• Present simulation data for peer review.
• Document design features and key testbench performance metrics.

Skills

Excellent communication skills

Detail-oriented

Analytical and problem-solving skills

Self-motivated and self-managing

Team collaboration and listening

Education

PhD in Engineering Science or Electrical and Computer Engineering

MSc in Engineering Science or Electrical and Computer Engineering

BSc in Electrical Engineering or related field

Tools

Cadence

SPICE

MATLAB

Verilog/VHDL

EDA tools for schematic/layout/verification

Job description

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > Analog Mixed Signal Design

General Summary:

Oversees definition, design, verification, and documentation for development of a variety of CMOS mixed analog/digital blocks such as: data converters, PLLs, analog/digital filters, low drop out linear voltage regulators, precision references, comparators, fingerprint sensor AFE, audio amplifiers and high speed SERDES. Determines architecture design and circuit specifications based on system level requirements. Is actively involved in all aspects of the design from system definition/simulation to circuit design and simulation. Heavy involvement in overseeing layout and silicon evaluation is also expected. Uses design tools such as Cadence ADE, MathWorks MATLAB and others. Provides technical expertise for new initiatives (e.g., 5G, analog design automation). Replacement Position

Minimum Qualifications:

• Bachelor's Degree in Electrical Engineering with 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET and 8+ years ASIC design, verification, or related work experience.
• OR
• Master's degree in Electrical Engineering or related field and 8+ years ASIC design, verification, or related work experience.
• OR
• PhD in Electrical Engineering or related field and 6+ years ASIC design, verification, or related work experience.
• 2+ years of experience using one or more design tools (e.g., CADENCE, SPICE, MATLAB, and/or Verilog/VHDL).

The Opportunity

The Qualcomm team combines technologists from different disciplines who come together with a shared passion for electronics, software, and communication technology. We look for individuals with a deep desire to build great products and we value collaboration, curiosity, and a commitment to solving hard problems.

What You’ll Do

• Work with a team of world-class engineers who are willing to help when needed and are happy to receive help when offered.
• Ensure analog block performance adheres to standard and system model specifications.
• Identify and refine circuit implementation to optimize power, performance and area targets.
• Propose design and verification strategies to ensure high quality design.
• Oversee physical layout to minimize the impact of parasitics, device stress, and process variation.
• Present simulation data for peer review.
• Document design features and key testbench performance metrics.
• Work with the application team to characterize your circuit and correlate measurements with simulation results.

What You’ll Need

• PhD degree or MSc degree in Engineering Science or Electrical and Computer Engineering is at a minimum.
• Familiarity with transistor-level circuit design using advanced CMOS technology nodes.
• Silicon-proven experience implementing circuits for analog building blocks.
• Design experience with one or more of the following circuit blocks: continuous time linear equalizer, slicer, high-speed ADC, voltage-controlled oscillator, phase interpolator, bandgap reference, voltage regulator, serializer, deserializer, voltage/current-mode transmitter, phase-locked loop, phase detector
• Experience optimizing CMOS layout to minimize parasitic impacts.
• Experience designing for reliability including management of aging, overstress, and electromigration issues.
• Experience with EDA tools for schematic entry, layout, and verification.
• Knowledge of SPICE simulators and simulation methods.
• Knowledgeable in Verilog-A for analog behavioural modeling.

About You

• Excellent communication skills
• Able to listen to and appreciate ideas and opinions that differ from yours
• Extremely detail oriented
• Superb analytical and problem-solving skills
• Drives for consistency
• Takes personal pride in high standard of outputs
• Self-motivated and self-managing

Applicants:

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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