PCIe Verification Engineer – Shape Next-Gen Processors

AMD; Markham; On-site; CAD 90,000 - 130,000; Full time

Benefits offered by this job

AMD benefits

Job summary

AMD is seeking a Digital Design Verification Engineer for the PCIe Subsystem in Canada. The role focuses on developing and verifying PCIe features using SystemVerilog/UVM testbenches, and collaborating with architects, RTL designers and validation teams across sites and time zones.

The candidate will own verification tasks, create test plans, and advance automation while contributing to memory sub-system architecture discussions. Location options include Markham, Ontario, or Vancouver, Canada.

Qualifications

• Experience building SystemVerilog/UVM testbenches.
• Proficient with PCIe, SATA and Ethernet protocols.
• Strong communication and teamwork across sites/time zones.
• Familiarity with verification tools and debugging flows.

Responsibilities

• Develop and enhance SystemVerilog/UVM testbenches for PCIe features.
• Collaborate with architects, RTL designers, and validation teams.
• Create staging and test plans for new feature development.
• Own verification tasks and improve automation through AI tools.
• Support post-silicon validation activities.

Skills

SystemVerilog

UVM

Testbenches

PCIe

Memory sub-system

RTL verification

AI automation

Cross-site collaboration

Education

Bachelor’s or Master’s degree

Tools

VCS

Debussy/DVE/Verdi

Job description

AMD is seeking a Digital Design Verification Engineer for the PCIe Subsystem in Canada. The role focuses on developing and verifying PCIe features using SystemVerilog/UVM testbenches, and collaborating with architects, RTL designers and validation teams across sites and time zones.

The candidate will own verification tasks, create test plans, and advance automation while contributing to memory sub-system architecture discussions. Location options include Markham, Ontario, or Vancouver, Canada.