Design Verification Engineer

Advanced Micro Devices; Markham; Hybrid; CAD 110,000 - 170,000; Full time

Job summary

Advanced Micro Devices (AMD) is seeking an experienced Silicon Design Verification Engineer to help drive next-generation IP verification for servers, datacenters, and client products in a hybrid Markham, ON environment.

You will lead architecture of verification environments, push for AI-assisted methods, and mentor peers while collaborating with design teams to ensure verification closure and robustness.

Qualifications

• 8+ years of hardware verification experience across multiple projects/tapeouts.
• Proficient in Verilog, SystemVerilog, UVM; comfortable in Linux/Windows environments.
• Experience applying AI agents/tools to functional verification and evaluating new AI-based verification tools.
• Strong programming skills and scripting ability.
• Experience with Makefiles and scripting languages (Perl, Python, Ruby).

Responsibilities

• Architect, develop, and maintain IP verification testbenches and infrastructure; set technical direction for the team.
• Own detailed test plans for new features and drive cross-functional reviews.
• Lead regression triage, debug simulations, analyze coverage, and drive issue resolution for verification closure.
• Deploy and evolve verification methodologies including UVM, formal verification, and AI-assisted flows.
• Take end-to-end ownership of key features across projects and mentor junior engineers.
• Reproduce silicon bugs in simulations or formal tools; conduct code reviews and establish coding standards.
• Mentor team on verification best practices and adopt industry-leading methodologies.

Skills

Hardware verification

Verilog/SystemVerilog

UVM

AI-assisted verification

Programming skills

Education

Bachelor's or Master's in Computer or Electrical Engineering

Tools

Linux

Windows

Makefiles

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

THE ROLE:

The Data Accelerator (DACC) team at AMD is seeking an experienced Silicon Design Verification Engineer to take a significant role across multiple aspects of IP verification. This is an excellent opportunity to drive next generation technologies that are part of AMD’s products powering Servers, Datacenters, Client and Embedded markets. You will join one of the fastest-growing areas of adding custom hardware offload engines to support complex operations like encryption, authentication, compression, GPU/CPU compute offloads & virtual machines live migration. This is a tremendous opportunity to shape the rapidly expanding domain of custom hardware accelerators. The Design Verification (DV) group within this team is responsible for developing a scalable DV flow and environment with emphasis on automation (including AI-driven verification), power and performance verification (PPV) and emulation support. You will help define this strategy and mentor other engineers. Our management fosters continuous technical innovation and career development.

THE PERSON:

Highly skilled in advanced ASIC Functional Verification techniques and planning, with a track record of owning complex verification challenges independently. Passionate about mentoring junior engineers, exploring new designs and implementation techniques and driving improvements to team methodology. The candidate enjoys an environment where everyone in the team can grow and develop with a sense of global team spirit. Strong analytical thinking and problem-solving skills, excellent attention to detail, and comfort operating with significant autonomy.

KEY RESPONSIBILITIES:

• Architect, develop, and maintain block- and subsystem-level IP verification testbenches, test methodology and infrastructure, setting technical direction for the team
• Own detailed test plans for covering new features across multiple blocks and drive test plan reviews with cross-functional stakeholders
• Lead triage of regressions, debug complex simulations, analyze coverage, and drive resolution of technical issues with design, verification and other teams to achieve verification closure
• Deploy and help evolve industry leading verification methodologies such as UVM, formal verification, and AI-assisted verification flows
• Take end to end ownership of key features across multiple projects, and mentor junior and mid-level engineers on verification best practices
• Reproduce silicon functional bugs in simulations and/or formal verification tools
• Conduct code reviews and help establish coding and verification standards for the team

PREFERRED EXPERIENCE:

• Extensive hands-on hardware verification experience (typically 8+ years) across multiple projects or tapeouts
• Proficient in Verilog, System Verilog, UVM and working in Linux and Windows environments
• Experience applying AI agents and skills to functional verification, and evaluating new AI-based verification tools for team-wide adoption
• Excellent programming skills
• Familiarity with Makefiles, scripting languages like perl, python, ruby etc.

HIGHLY DESIREABLE EXPERIENCE – AI/ML FOR VERIFICATION:

• Experience building or driving adoption of AI-assisted or agentic verification flows (e.g., LLM-generated UVM sequences/assertions, AI-assisted debug and log triage, automated root-cause analysis)
• Track record of applying machine learning or data-driven techniques to coverage closure, regression prioritization, or bug prediction
• Ability to evaluate, pilot, and champion emerging AI/ML verification tools and methodologies within a broader DV organization

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in Computer or Electrical Engineering with industry verification experience

LOCATION: Markham, ON

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services.

AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.

We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s "Responsible AI Policy" is available here.

This posting is for an existing vacancy.