Lead High-Speed SerDes Analog Design

Synopsys Inc; Ottawa; On-site; CAD 160,000 - 230,000; Full time

Job summary

Synopsys Inc. in Mississauga, ON, seeks an experienced analog/mixed-signal IC design leader to drive SerDes IP development for high-speed applications.

You will mentor a small team of engineers, define architectures for NRZ and PAM4, and collaborate with digital and layout teams to meet power, area and reliability targets. This role blends hands-on design with people leadership in a fast-moving R&D environment, offering opportunities to influence next-generation silicon in AI, data center, and

Qualifications

• M.A.Sc. with 8+ years or PhD with 6+ years in analog/mixed-signal IC design.
• 2+ years of people management, including developing employees, hiring, and growing teams.
• Strong background in circuit/system modeling, analog design, DSP, and communications theory.
• Proven experience with Multi-Gbps SerDes architectures, including TX, RX, equalizers, and PLLs.

Responsibilities

• Lead a team of engineers from specification through design review.
• Define transceiver architectures and analog sub-block specs for high-speed NRZ and PAM4 IP.
• Collaborate with digital and layout teams to ensure efficient design, verification, and implementation.
• Present technical results and design tradeoffs to internal teams and stakeholders.
• Document design features, test plans, and results clearly and accurately.
• Support electrical characterization and post-silicon improvements.

Skills

Analog design

Multi-Gbps SerDes

People management

DSP

Circuit/system modeling

Schematic entry

Layout collaboration

Verilog-A modeling

Communication

Education

M.A.Sc./PhD in EE

Tools

SPICE

Verilog-A

IC design tools

Job description

Synopsys Inc. in Mississauga, ON, seeks an experienced analog/mixed-signal IC design leader to drive SerDes IP development for high-speed applications.

You will mentor a small team of engineers, define architectures for NRZ and PAM4, and collaborate with digital and layout teams to meet power, area and reliability targets. This role blends hands-on design with people leadership in a fast-moving R&D environment, offering opportunities to influence next-generation silicon in AI, data center, and