Senior Analog IC Architect – SerDes & High-Speed I/O

Cadence; Canada; On-site; CAD 157,000 - 291,000; Full time

Benefits offered by this job

Bonus program

Equity

Health benefits

RRSP plan

Life insurance

Job summary

Cadence is seeking an experienced Design Architect Analog IC Designer in Canada to lead analog/mixed-signal block design from concept to verification and contribute to long-reach SerDes.

The role requires 10+ years in high-speed I/O ICs, strong jitter knowledge, Cadence CAD proficiency, and MS/PhD in EE. The salary range for Canada is 156,800 CAD to 291,200 CAD per year, with potential bonuses and benefits.

Qualifications

• 10+ years in CMOS SerDes or high-speed I/O IC development.
• Deep understanding of jitter and signal equalization.
• Experience designing SerDes blocks: TX/RX, serializer/deserializer, PLL, clock distribution, ADC/DAC.
• Strong problem-solving and team communication skills.
• Familiar with SerDes standards and electrical requirements.
• Proficient CAD tools for circuit simulation and post-layout verification; layout is a plus.
• Cadence tools, lab test experience, and design experience at ≥16Gbps and in ≥16nm tech.
• MS or PhD in EE.

Responsibilities

• Design and develop analog/mixed-signal IC blocks from concept to verification.
• Contribute to the design of long-reach SerDes.
• Collaborate with cross-functional teams to meet customer specs.

Skills

CMOS SerDes experience

Jitter & equalization

Teamwork & communication

Cadence CAD tools

Education

MS or PhD in EE

Tools

Cadence tool suite

Lab test experience

16nm technology

Job description

Cadence is seeking an experienced Design Architect Analog IC Designer in Canada to lead analog/mixed-signal block design from concept to verification and contribute to long-reach SerDes.

The role requires 10+ years in high-speed I/O ICs, strong jitter knowledge, Cadence CAD proficiency, and MS/PhD in EE. The salary range for Canada is 156,800 CAD to 291,200 CAD per year, with potential bonuses and benefits.