Senior Analog Architect, SerDes & High-Speed IP Lead

Synopsys Inc; Mississauga; On-site; CAD 140,000 - 210,000; Full time

Job summary

Synopsys Inc. seeks a visionary analog designer to own SerDes macro circuits, driving architecture, verification, and layout excellence. You will lead sub-block progress, refine analog specifications, and optimize for power, area, and performance while collaborating with digital RTL teams.

The role emphasizes mentorship, rigorous verification, and documentation of design features and test plans, enabling silicon-proven IP products for advanced connectivity.

Qualifications

• PhD with 10+ years, or MSc with 12+ years of SerDes/high-speed analog design experience.
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Responsibilities

• Own the architecture, design, and implementation of analog macro-level circuits for SerDes IP.
• Track and review the technical progress of sub-block owners, ensuring alignment with project goals.
• Interpret SerDes standards and architecture documents to develop detailed analog specifications.
• Identify and refine circuit implementations, optimizing for power, area, and performance targets.
• Propose and execute design and verification strategies using advanced simulator features for robust outcomes.
• Oversee physical layout to minimize parasitics, device stress, and process variation impacts.
• Collaborate closely with digital RTL engineers on calibration, adaptation, and control algorithms for analog circuits.
• Present simulation data and technical insights for peer and customer reviews.
• Mentor and review the progress of junior engineers, fostering growth and technical excellence.
• Document design features, methodologies, and test plans for internal and customer use.
• Consult on electrical characterization and testing of circuits within the SerDes IP product portfolio.

Skills

SerDes design

Analog circuit design

CMOS fundamentals

Leadership

Mentoring

Problem solving

Communication

Verilog-A

Python

MATLAB

Education

PhD in Electrical Engineering

MSc with 12+ years SerDes/high-speed analog design

Tools

SPICE simulators

EDA tools

Schematic entry tools

Physical layout tools

Python

C

Job description

Synopsys Inc. seeks a visionary analog designer to own SerDes macro circuits, driving architecture, verification, and layout excellence. You will lead sub-block progress, refine analog specifications, and optimize for power, area, and performance while collaborating with digital RTL teams.

The role emphasizes mentorship, rigorous verification, and documentation of design features and test plans, enabling silicon-proven IP products for advanced connectivity.